3ee9935f63
Add XMP memory profiles support that has been tested on f15tn (A88XM-E) and f16kb (AM1I-A) with two Crucial BLT8G3D1869DT1TX0, XMP 1 profile. Added using the datasheets from https://github.com/mikebdp2/ddr3spd : JEDEC_DDR3_SPD_4_01_02_11R24.pdf and Intel_XMP_Spec_Rev1.1.pdf Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I584416e3376afdf377a11783e55c5e9ff41e6b0d Reviewed-on: https://review.coreboot.org/c/coreboot/+/40488 Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
51 lines
1.2 KiB
Text
51 lines
1.2 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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if CPU_AMD_AGESA || CPU_AMD_PI || SOC_AMD_PI
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menu "AMD Platform Initialization"
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choice
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prompt "AGESA source"
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default CPU_AMD_AGESA_BINARY_PI if CPU_AMD_PI
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default CPU_AMD_AGESA_BINARY_PI if SOC_AMD_PI
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default CPU_AMD_AGESA_OPENSOURCE if CPU_AMD_AGESA
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help
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Select the method for including the AMD Platform Initialization
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code into coreboot. Platform Initialization code is required for
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all AMD processors.
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config CPU_AMD_AGESA_BINARY_PI
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bool "binary PI"
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help
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Use a binary PI package. Generally, these will be stored in the
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"3rdparty/blobs" directory. For some processors, these must be obtained
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directly from AMD Embedded Processors Group
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(http://www.amd.com/embedded).
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config CPU_AMD_AGESA_OPENSOURCE
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bool "open-source AGESA"
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help
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Build the PI package ("AGESA") from source code in the "vendorcode"
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directory.
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endchoice
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if CPU_AMD_AGESA_OPENSOURCE
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source "src/vendorcode/amd/agesa/Kconfig"
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endif
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if CPU_AMD_AGESA_BINARY_PI
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source "src/vendorcode/amd/pi/Kconfig"
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endif
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config AGESA_EXTRA_TIMESTAMPS
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bool "Add instrumentation for AGESA calls"
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default n
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depends on DRIVERS_AMD_PI
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help
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Insert additional timestamps around each entrypoint into
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AGESA vendorcode.
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endmenu
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endif
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