Kyösti Mälkki 773485b892 intel CAR: Fix DCACHE_RAM_BASE for old sockets ... When using fixed MTRRs for CAR setup, CONFIG_DCACHE_RAM_BASE is ignored and was not correctly set on affected sockets and boards. It was still referenced in romstage linker script. This was discovered by clang builds failing for cases where DCACHE_RAM_BASE = 0, while gcc builds passed. The actual DCACHE_RAM_BASE programming is base = 0xd0000 - size, as taken from intel/cpu/cache_as_ram.inc. Change-Id: Ied5ab2e9683f12990f1aad48ee15eaf91133121c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7887 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>		2014-12-30 10:21:43 +01:00
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em8510	intel CAR: Fix DCACHE_RAM_BASE for old sockets	2014-12-30 10:21:43 +01:00
Kconfig	Restructured all vendors' Kconfig files to no longer source the boards'	2010-08-30 16:36:51 +00:00