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Johnny Lin 514930c2af soc/intel/xeon_sp: Fix very small total memory when CXL is enabled
Processor attached memory should not use reserved_ram_from_to and
treat the calculation of gi_mem_size size as 64MB.

By default SOC_INTEL_HAS_CXL is enabled for Sapphire Rapids platforms,
this should fix small total memory issue. Before the fix running
command 'free -g -h' under Linux shows the total memory is only 1.4Gi,
after the fix it's showing the expected total memory size 15Gi.

Tested=On AC without attaching CXL memory, the total memory size is
the same as de-selecting SOC_INTEL_HAS_CXL.
On OCP Crater Lake with CXL memory attached, CXL memory can be recognized
in NUMA node 1:
numactl -H
available: 2 nodes (0-1)
node 0 cpus: 0 1 2 3 4 5 6 .. 59
node 0 size: 95854 MB
node 0 free: 93860 MB
node 1 cpus:
node 1 size: 63488 MB
node 1 free: 63488 MB
node distances:
node   0   1
  0:  10  14
  1:  14  10

Change-Id: I38e9d138fd284620ac616a65f444e943f1774869
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74296
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-04-13 07:56:23 +00:00
3rdparty Update arm-trusted-firmware submodule to upstream master 2023-03-17 13:55:14 +00:00
Documentation mb/intel/dq67sw: Add LGA1155 microATX mainboard 2023-03-31 12:10:03 +00:00
LICENSES
configs configs/config.lenovo_t400_vboot_and_debug: Move PT lower 2023-04-06 15:12:37 +00:00
payloads tree: Replace `egrep` with `grep -E` 2023-04-06 19:54:44 +00:00
spd util/spd_tools: Add support for Phoenix platform 2023-04-05 10:01:15 +00:00
src soc/intel/xeon_sp: Fix very small total memory when CXL is enabled 2023-04-13 07:56:23 +00:00
tests drivers/efi: Add EFI variable store option support 2023-04-03 21:13:54 +00:00
util cbfstool: Add comment to define stability rules for cbfstool print -k 2023-04-13 00:43:23 +00:00
.checkpatch.conf
.clang-format
.editorconfig
.gitignore
.gitmodules Revert ".gitmodules: Fix submodule revision to v0.1 tag" 2023-01-16 05:18:27 +00:00
.gitreview
.mailmap
AUTHORS
COPYING
MAINTAINERS MAINTAINERS: Update maintainers for MediaTek SoCs and mainboards 2023-04-13 00:50:03 +00:00
Makefile Makefile: Fix project_filelist.txt generation 2023-02-20 10:23:53 +00:00
Makefile.inc Makefile.inc: introduce all_x86 target 2023-04-04 19:17:28 +00:00
README.md README.md: Update links 2023-01-11 11:11:32 +00:00
gnat.adc
toolchain.inc

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary firmware (BIOS/UEFI) found in most computers. coreboot performs the required hardware initialization to configure the system, then passes control to a different executable, referred to in coreboot as the payload. Most often, the primary function of the payload is to boot the operating system (OS).

With the separation of hardware initialization and later boot logic, coreboot is perfect for a wide variety of situations. It can be used for specialized applications that run directly in the firmware, running operating systems from flash, loading custom bootloaders, or implementing firmware standards, like PC BIOS services or UEFI. This flexibility allows coreboot systems to include only the features necessary in the target application, reducing the amount of code and flash space required.

Source code

All source code for coreboot is stored in git. It is downloaded with the command:

git clone https://review.coreboot.org/coreboot.git.

Code reviews are done in the project's Gerrit instance.

The code may be browsed via coreboot's Gitiles instance.

The coreboot project also maintains a mirror of the project on github. This is read-only, as coreboot does not accept github pull requests, but allows browsing and downloading the coreboot source.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://doc.coreboot.org/payloads.html for a list of some of coreboot's supported payloads.

Supported Hardware

The coreboot project supports a wide range of architectures, chipsets, devices, and mainboards. While not all of these are documented, you can find some information in the Architecture-specific documentation or the SOC-specific documentation.

For details about the specific mainboard devices that coreboot supports, please consult the Mainboard-specific documentation or the Board Status pages.

Releases

Releases are currently done by coreboot every quarter. The release archives contain the entire coreboot codebase from the time of the release, along with any external submodules. The submodules containing binaries are separated from the general release archives. All of the packages required to build the coreboot toolchains are also kept at coreboot.org in case the websites change, or those specific packages become unavailable in the future.

All releases are available on the coreboot download page.

Please note that the coreboot releases are best considered as snapshots of the codebase, and do not currently guarantee any sort of extra stability.

Build Requirements and building coreboot

The coreboot build, associated utilities and payloads require many additional tools and packages to build. The actual coreboot binary is typically built using a coreboot-controlled toolchain to provide reproducibility across various platforms. It is also possible, though not recommended, to make it directly with your system toolchain. Operating systems and distributions come with an unknown variety of system tools and utilities installed. Because of this, it isn't reasonable to list all the required packages to do a build, but the documentation lists the requirements for a few different Linux distributions.

To see the list of tools and libraries, along with a list of instructions to get started building coreboot, go to the Starting from scratch tutorial page.

That same page goes through how to use QEMU to boot the build and see the output.

Website and Mailing List

Further details on the project, as well as links to documentation and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://doc.coreboot.org/community/forums.html

Copyrights and Licenses

Uncopyrightable files

There are many files in the coreboot tree that we feel are not copyrightable due to a lack of creative content.

"In order to qualify for copyright protection in the United States, a work must satisfy the originality requirement, which has two parts. The work must have “at least a modicum” of creativity, and it must be the independent creation of its author."

https://guides.lib.umich.edu/copyrightbasics/copyrightability

Similar terms apply to other locations.

These uncopyrightable files include:

  • Empty files or files with only a comment explaining their existence. These may be required to exist as part of the build process but are not needed for the particular project.
  • Configuration files either in binary or text form. Examples would be files such as .vbt files describing graphics configuration, spd files as binary .spd or text *spd*.hex representing memory chip configuration.
  • Machine-generated files containing version numbers, dates, hash values or other "non-creative" content.

As non-creative content, these files are in the public domain by default. As such, the coreboot project excludes them from the project's general license even though they may be included in a final binary.

If there are questions or concerns about this policy, please get in touch with the coreboot project via the mailing list.

Copyrights

The copyright on coreboot is owned by quite a large number of individual developers and companies. A list of companies and individuals with known copyright claims is present at the top level of the coreboot source tree in the 'AUTHORS' file. Please check the git history of each of the source files for details.

Licenses

Because of the way coreboot began, using a significant amount of source code from the Linux kernel, it's licensed the same way as the Linux Kernel, with GNU General Public License (GPL) Version 2. Individual files are licensed under various licenses, though all are compatible with GPLv2. The resulting coreboot image is licensed under the GPL, version 2. All source files should have an SPDX license identifier at the top for clarification.

Files under coreboot/Documentation/ are licensed under CC-BY 4.0 terms. As an exception, files under Documentation/ with a history older than 2017-05-24 might be under different licenses.

Files in the coreboot/src/commonlib/bsd directory are all licensed with the BSD-3-clause license. Many are also dual-licensed GPL-2.0-only or GPL-2.0-or-later. These files are intended to be shared with libpayload or other BSD licensed projects.

The libpayload project contained in coreboot/payloads/libpayload may be licensed as BSD or GPL, depending on the code pulled in during the build process. All GPL source code should be excluded unless the Kconfig option to include it is set.

The Software Freedom Conservancy

Since 2017, coreboot has been a member of The Software Freedom Conservancy, a nonprofit organization devoted to ethical technology and driving initiatives to make technology more inclusive. The conservancy acts as coreboot's fiscal sponsor and legal advisor.