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Kevin Keijzer 51b1b2a0c4 mb/lenovo/x200: Fix boot-time docking state
The X200 would undock itself when waking up from S3, requiring a
physical reconnection before the dock would work again.

Similar to 4611ad8, this reintroduces h8_mb_init() for the X200. A hook
function h8_mb_init() will be called at the end of h8_enable(), in place
of the ancient h8_mainboard_init_dock().

This should fix the regression the X201 and T410 also suffered from for
the X200.

Change-Id: Icb6dd145e56b90e0e04133810c5e9ac7b641ad68
Signed-off-by: Kevin Keijzer <kevin@quietlife.nl>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51123
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-19 17:18:37 +00:00
3rdparty 3rdparty/intel-sec-tools: Update submodule pointer 2021-03-19 11:35:13 +00:00
Documentation doc/mb/lenovo/montevina: Update link within page 2021-03-19 12:46:06 +00:00
LICENSES
configs configs: Build-test QEMU i440fx with AddressSanitizer (ASan) 2021-03-19 11:19:19 +00:00
payloads payloads/LinuxBoot/u-root: add boot template to u-root 2021-03-14 02:41:56 +00:00
src mb/lenovo/x200: Fix boot-time docking state 2021-03-19 17:18:37 +00:00
tests tests: memset-test: Parenthesize zero size argument for clang 2021-03-18 15:02:13 +00:00
util util/ifittool: Add an option to set the FIT pointer a CBFS file 2021-03-19 11:22:55 +00:00
.checkpatch.conf
.clang-format
.editorconfig
.gitignore
.gitmodules
.gitreview
AUTHORS
COPYING
MAINTAINERS vendor: mediatek: Add mediatek mt8192 dram initialization code 2021-03-08 01:49:52 +00:00
Makefile
Makefile.inc Makefile.inc: Don't compile bare structs with asan-global=1 2021-03-17 08:04:06 +00:00
README.md
gnat.adc
toolchain.inc toolchain.inc: Update and fix the test-toolchain target 2021-02-24 11:29:39 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.