c888a7bbaa
Change-Id: I2a94c3b6282e9915fd2b8136b124740c8a7b774c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36082 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2018 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cf9_reset.h>
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#include <console/console.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/pmclib.h>
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#include <fsp/util.h>
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#include <soc/intel/common/reset.h>
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#include <soc/pci_devs.h>
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void do_global_reset(void)
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{
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/* Ask CSE to do the global reset */
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if (!send_heci_reset_req_message(GLOBAL_RESET))
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return;
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/* global reset if CSE fail to reset */
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pmc_global_reset_enable(1);
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do_full_reset();
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}
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void chipset_handle_reset(uint32_t status)
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{
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switch (status) {
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case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
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printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
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global_reset();
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break;
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default:
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printk(BIOS_ERR, "unhandled reset type %x\n", status);
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die("unknown reset type");
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break;
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}
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}
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