coreboot-kgpe-d16/src/soc/intel
Marc Jones 5258f4f93e soc/intel/common/block/acpi: Skip UART debug table if not used
Skip the ACPI UART debug table if common block UART isn't selected.

Change-Id: I8d627998ca450c32496c90e51aad48f332b40e23
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48247
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-11 15:59:49 +00:00
..
alderlake soc/intel/common/dmi: Move DMI defines into DMI driver header 2020-12-09 14:23:15 +00:00
apollolake soc/intel/common: Adapt XHCI elog driver for reuse 2020-12-10 17:45:47 +00:00
baytrail src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
braswell cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
broadwell src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
cannonlake soc/intel/common: Adapt XHCI elog driver for reuse 2020-12-10 17:45:47 +00:00
common soc/intel/common/block/acpi: Skip UART debug table if not used 2020-12-11 15:59:49 +00:00
denverton_ns src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
elkhartlake mb/intel/ehlcrb: Add EHL CRB memory initialization support 2020-12-10 10:49:15 +00:00
icelake soc/intel/common/dmi: Move DMI defines into DMI driver header 2020-12-09 14:23:15 +00:00
jasperlake soc/intel/common: Adapt XHCI elog driver for reuse 2020-12-10 17:45:47 +00:00
quark cbfs: Introduce cbfs_ro_map() and cbfs_ro_load() 2020-12-03 00:00:19 +00:00
skylake soc/intel/common/block/lpc: Move southbridge_write_acpi_tables declaration 2020-12-11 15:57:44 +00:00
tigerlake soc/intel/tigerlake: Check TBT & TCSS ports for wake events 2020-12-10 17:47:03 +00:00
xeon_sp soc/intel/common/block/lpc: Move southbridge_write_acpi_tables declaration 2020-12-11 15:57:44 +00:00
Kconfig