coreboot-kgpe-d16/src/southbridge/intel
Arthur Heymans be9533aba9 nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support
The i82801ix_early_init is now called both in the bootblock and
romstage. The rationale behind setting this up twice is to ensure
bootblock-romstage compatibility in the future if for instance VBOOT
is used.

This moves the console init to the bootblock.

The romstage now runs uncached. Adding a prog_run hooks to set up an
MTRR to cache the romstage will be done in a followup patch.

The default size of 64KiB is not modified for the bootblock as trying
to fit both EHCI and SPI flash debugging needs a more space and 64KiB
is the next power of 2 size that fits it.

TESTED on Thinkpad X200.

Change-Id: I8f59736cb54377973215f35e35d2cbcd1d82c374
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-28 11:59:17 +00:00
..
bd82x6x src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>' 2019-10-21 14:21:09 +00:00
common sb/intel/common/smihandler: Fix compilation on x86_64 2019-10-22 12:47:26 +00:00
fsp_rangeley device: Use scan_static_bus() over scan_lpc_bus() 2019-10-08 12:59:56 +00:00
i82371eb src: Remove unused include '<device/pci_ids.h>' 2019-10-18 18:41:09 +00:00
i82801dx device: Use scan_static_bus() over scan_lpc_bus() 2019-10-08 12:59:56 +00:00
i82801gx sb/intel/i82801gx: Set FERR# Mux Enable only on mobile platforms 2019-10-22 20:07:11 +00:00
i82801ix nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support 2019-10-28 11:59:17 +00:00
i82801jx device: Use scan_static_bus() over scan_lpc_bus() 2019-10-08 12:59:56 +00:00
i82870 devicetree: Fix improper use of chip_operations 2019-10-04 16:29:31 +00:00
ibexpeak src: Remove unused '#include <cpu/cpu.h>' 2019-10-28 11:56:38 +00:00
lynxpoint src/southbridge: Use 'include <stdlib.h>' when appropriate 2019-10-28 11:57:01 +00:00