6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
93 lines
1.7 KiB
C
93 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <acpi/acpi.h>
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#include <arch/io.h>
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#include <bootmode.h>
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#include <device/pci_ops.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <assert.h>
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#include "pmbase.h"
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#include "pmutil.h"
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/* LPC PM Base Address Register */
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#define PMBASE 0x40
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#define PMSIZE 0x80
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/* PCI Configuration Space (D31:F0): LPC */
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#if defined(__SIMPLE_DEVICE__)
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#define PCH_LPC_DEV PCI_DEV(0, 0x1f, 0)
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#else
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#define PCH_LPC_DEV pcidev_on_root(0x1f, 0)
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#endif
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u16 lpc_get_pmbase(void)
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{
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#ifdef __SIMPLE_DEVICE__
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/* Don't assume PMBASE is still the same */
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return pci_read_config16(PCH_LPC_DEV, PMBASE) & 0xfffc;
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#else
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static u16 pmbase;
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if (pmbase)
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return pmbase;
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pmbase = pci_read_config16(PCH_LPC_DEV, PMBASE) & 0xfffc;
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return pmbase;
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#endif
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}
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void write_pmbase32(const u8 addr, const u32 val)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u32)));
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outl(val, lpc_get_pmbase() + addr);
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}
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void write_pmbase16(const u8 addr, const u16 val)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u16)));
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outw(val, lpc_get_pmbase() + addr);
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}
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void write_pmbase8(const u8 addr, const u8 val)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u8)));
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outb(val, lpc_get_pmbase() + addr);
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}
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u32 read_pmbase32(const u8 addr)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u32)));
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return inl(lpc_get_pmbase() + addr);
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}
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u16 read_pmbase16(const u8 addr)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u16)));
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return inw(lpc_get_pmbase() + addr);
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}
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u8 read_pmbase8(const u8 addr)
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{
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ASSERT(addr <= (PMSIZE - sizeof(u8)));
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return inb(lpc_get_pmbase() + addr);
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}
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int platform_is_resuming(void)
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{
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u16 reg16 = read_pmbase16(PM1_STS);
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if (!(reg16 & WAK_STS))
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return 0;
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return acpi_sleep_from_pm1(reg16) == ACPI_S3;
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}
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