8950cfb66f
Change-Id: I0727a6b327410197cf32f598d1312737744386b3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: David Guckian
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <reg_script.h>
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#include <soc/iosf.h>
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#include <soc/nvs.h>
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#include <soc/pci_devs.h>
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#include <soc/ramstage.h>
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#include "chip.h"
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static const struct reg_script emmc_ops[] = {
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REG_SCRIPT_END,
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};
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static void emmc_init(struct device *dev)
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{
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struct soc_intel_braswell_config *config = config_of(dev);
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printk(BIOS_SPEW, "%s/%s (%s)\n",
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__FILE__, __func__, dev_name(dev));
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printk(BIOS_DEBUG, "eMMC init\n");
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reg_script_run_on_dev(dev, emmc_ops);
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if (config->emmc_acpi_mode) {
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printk(BIOS_DEBUG, "Enabling ACPI mode\n");
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scc_enable_acpi_mode(dev, SCC_MMC_CTL, SCC_NVS_MMC);
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}
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}
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static struct device_operations emmc_device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = emmc_init,
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.ops_pci = &soc_pci_ops,
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};
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static const struct pci_driver southcluster __pci_driver = {
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.ops = &emmc_device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = MMC_DEVID,
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};
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