493937e1d6
This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| arm/arch | ||
| arm64/arch | ||
| arpa | ||
| pci | ||
| storage | ||
| sys | ||
| udc | ||
| usb | ||
| x86/arch | ||
| archive.h | ||
| assert.h | ||
| cbfs.h | ||
| cbfs_core.h | ||
| cbfs_ram.h | ||
| cbgfx.h | ||
| compiler.h | ||
| coreboot_tables.h | ||
| ctype.h | ||
| die.h | ||
| endian.h | ||
| errno.h | ||
| exception.h | ||
| fmap_serialized.h | ||
| fpmath.h | ||
| gdb.h | ||
| getopt.h | ||
| inttypes.h | ||
| ipchksum.h | ||
| kconfig.h | ||
| keycodes.h | ||
| libpayload.h | ||
| limits.h | ||
| lz4.h | ||
| lzma.h | ||
| malloc.h | ||
| multiboot_tables.h | ||
| panel.h | ||
| pci.h | ||
| queue.h | ||
| stdarg.h | ||
| stdbool.h | ||
| stddef.h | ||
| stdint.h | ||
| stdio.h | ||
| stdlib.h | ||
| string.h | ||
| strings.h | ||
| sysinfo.h | ||
| term.h | ||
| time.h | ||
| unistd.h | ||
| video_console.h | ||