coreboot-kgpe-d16/src/mainboard/google/rush_ryu
Tom Warren 5541928702 Ryu: Rewrite I2C6 mux init
Do the absolute minimum needed to allow the DPAUX mux ctl write
for I2C6. This leaves HOST1X off (reset and clock disabled) to
avoid a conflict with any kernel display driver init.

I2C6 init/enable will be moved to ramstage in the next CL.

BUG=chrome-os-partner:31820
BRANCH=none
TEST=Dumped Speaker Driver (AD SSM4567) regs on Ryu, looks good.

Change-Id: I42106778a26c5a1d1483cc308b8314599c391539
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24a9ebfda31c620b24e5c765dc950b87e3e5587b
Original-Change-Id: I0760222f1d7ccee207ae9871aeed3e2ddbca3dca
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/218900
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9093
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-28 07:05:38 +01:00
..
bct ryu: Remove old/unused BCT cfg files 2015-03-27 08:04:38 +01:00
boardid.c ryu: normalize board id 2015-03-27 08:03:49 +01:00
bootblock.c ryu: use named bus numbers instead of literals 2015-03-27 08:03:31 +01:00
chromeos.c ryu: fix power button polarity 2015-03-27 08:04:37 +01:00
devicetree.cb ryu: use generic spin table 2015-03-28 07:05:15 +01:00
gpio.h ryu: fix power button polarity 2015-03-27 08:04:37 +01:00
Kconfig ryu: use generic spin table 2015-03-28 07:05:15 +01:00
mainboard.c ryu: Get rid of coreboot setting up DMA areas for libpayload 2015-03-28 07:04:46 +01:00
Makefile.inc ryu: initialize LTE modem 2015-03-27 08:03:39 +01:00
pmic.c ryu: initialize LTE modem 2015-03-27 08:03:39 +01:00
pmic.h ryu: initialize LTE modem 2015-03-27 08:03:39 +01:00
reset.c rush: use names for gpios 2015-03-27 08:04:36 +01:00
romstage.c Ryu: Rewrite I2C6 mux init 2015-03-28 07:05:38 +01:00
sdram_configs.c ryu: Add 4 LPDDR3 SDRAM BCTs 2015-03-25 22:31:37 +01:00