017c59096a
Add common gpio functionalities across qualcomm soc targets. This common gpio driver would allow the consumers to be able to configure gpio function, set/get gpio direction as input/output, configure the gpio as pull-up/pull-down, configure the gpio as an IRQ and also query the gpio irq status. The GPIO pin definition would be SoC specific. BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board Signed-off-by: Taniya Das <tdas@codeaurora.org> Change-Id: Ia672130c6ca938d9284cae5071307637709480d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55076 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
87 lines
2.2 KiB
C
87 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <assert.h>
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#include <device/mmio.h>
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#include <gpio.h>
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void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull,
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uint32_t drive_str, uint32_t enable)
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{
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struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
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uint32_t reg_val;
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/* gpio pull only PULLNONE, PULLUP, KEEPER, PULLDOWN status */
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assert(pull <= GPIO_PULL_UP);
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reg_val = ((enable & GPIO_BMSK) << GPIO_CFG_OE_SHFT) |
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((drive_str & GPIO_CFG_DRV_BMSK) << GPIO_CFG_DRV_SHFT) |
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((func & GPIO_CFG_FUNC_BMSK) << GPIO_CFG_FUNC_SHFT) |
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((pull & GPIO_CFG_PULL_BMSK) << GPIO_CFG_PULL_SHFT);
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write32(®s->cfg, reg_val);
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}
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void gpio_set(gpio_t gpio, int value)
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{
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struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
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write32(®s->in_out, (!!value) << GPIO_IO_OUT_SHFT);
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}
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int gpio_get(gpio_t gpio)
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{
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struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
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return ((read32(®s->in_out) >> GPIO_IO_IN_SHFT) & GPIO_BMSK);
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}
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void gpio_input_pulldown(gpio_t gpio)
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{
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gpio_configure(gpio, GPIO_FUNC_GPIO,
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GPIO_PULL_DOWN, GPIO_2MA, GPIO_INPUT);
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}
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void gpio_input_pullup(gpio_t gpio)
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{
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gpio_configure(gpio, GPIO_FUNC_GPIO,
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GPIO_PULL_UP, GPIO_2MA, GPIO_INPUT);
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}
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void gpio_input(gpio_t gpio)
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{
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gpio_configure(gpio, GPIO_FUNC_GPIO,
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GPIO_NO_PULL, GPIO_2MA, GPIO_INPUT);
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}
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void gpio_output(gpio_t gpio, int value)
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{
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gpio_set(gpio, value);
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gpio_configure(gpio, GPIO_FUNC_GPIO,
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GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT);
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}
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void gpio_input_irq(gpio_t gpio, enum gpio_irq_type type, uint32_t pull)
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{
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struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
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gpio_configure(gpio, GPIO_FUNC_GPIO,
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pull, GPIO_2MA, GPIO_INPUT);
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clrsetbits32(®s->intr_cfg, GPIO_INTR_DECT_CTL_MASK <<
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GPIO_INTR_DECT_CTL_SHFT, type << GPIO_INTR_DECT_CTL_SHFT);
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clrsetbits32(®s->intr_cfg, GPIO_INTR_STATUS_ENABLE
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<< GPIO_INTR_RAW_STATUS_EN_SHFT, GPIO_INTR_STATUS_ENABLE
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<< GPIO_INTR_RAW_STATUS_EN_SHFT);
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}
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int gpio_irq_status(gpio_t gpio)
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{
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struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
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if (!(read32(®s->intr_status) & GPIO_INTR_STATUS_MASK))
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return GPIO_INTR_STATUS_DISABLE;
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write32(®s->intr_status, GPIO_INTR_STATUS_DISABLE);
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return GPIO_INTR_STATUS_ENABLE;
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}
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