coreboot-kgpe-d16/src/cpu
Martin Roth df205067c9 Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig
The Kconfig symbol CACHE_MRC_BIN was getting forced enabled everywhere
it existed.

Remove the Kconfig symbol and get rid of the #if statements
surrounding the code.

This fixes the Kconfig warning for Haswell & Broadwell chips:
warning: (NORTHBRIDGE_INTEL_HASWELL &&
NORTHBRIDGE_INTEL_SANDYBRIDGE &&
NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE &&
NORTHBRIDGE_INTEL_IVYBRIDGE &&
NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE &&
CPU_SPECIFIC_OPTIONS) selects CACHE_MRC_BIN
which has unmet direct dependencies
(CPU_INTEL_SOCKET_RPGA988B || CPU_INTEL_SOCKET_RPGA989)

Change-Id: Ie0f0726e3d6f217e2cb3be73034405081ce0735a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11270
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-25 17:36:45 +00:00
..
allwinner cbfs: new API and better program loading 2015-06-02 14:09:31 +02:00
amd cpu/amd/model_10xxx: Do not initialize SMM memory if SMM is disabled 2015-08-14 01:16:22 +02:00
armltd vboot2: add verstage 2015-01-27 01:41:40 +01:00
dmp Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
intel Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig 2015-08-25 17:36:45 +00:00
mips Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
qemu-x86 Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
samsung/exynos5250 3rdparty: move to 3rdparty/blobs 2015-05-05 22:49:18 +02:00
ti Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
via via/nano: Move CPU microcode to 3rdparty/blobs 2015-08-07 19:31:56 +02:00
x86 amd: raminit sysinfo offset fix 2015-08-13 16:10:17 +02:00
Kconfig cpu/amd/car: Move AP stacks below the BSP stack to free up space 2015-07-07 01:41:59 +02:00
Makefile.inc cpu: add x64 class for cpu_microcode 2015-06-16 02:47:57 +02:00