coreboot-kgpe-d16/src/southbridge/intel/lynxpoint
Aaron Durbin 569c653a72 lynx point: add new ME status information
According to the 0.8.0 ME BWG this is a new state. It's not very clear
what exactly it entails, but the Basking Ridge CRB was tripping it when
MRC_DEBUG was enabled (presumably because of a DID timeout).

Instead of 0x17 one can now see the proper message for this state.

Change-Id: I5bda1de7d3d957d38a4760a02dcd170ec48782e9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2640
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-14 18:23:45 +01:00
..
acpi
acpi.c
azalia.c
bootblock.c
chip.h
early_me.c lynxpoint: PMIR register rename 2013-03-14 06:33:32 +01:00
early_smbus.c
early_spi.c
early_usb.c
elog.c
finalize.c haswell: remove explicit pcie config accesses 2013-03-14 06:35:48 +01:00
gpio.c
gpio.h
Kconfig
lpc.c haswell: add PCI id support 2013-03-14 05:10:13 +01:00
Makefile.inc
me.h lynx point: add new ME status information 2013-03-14 18:23:45 +01:00
me_9.x.c haswell: remove explicit pcie config accesses 2013-03-14 06:35:48 +01:00
me_status.c lynx point: add new ME status information 2013-03-14 18:23:45 +01:00
nvs.h
pch.c
pch.h lynxpoint: PMIR register rename 2013-03-14 06:33:32 +01:00
pci.c
pcie.c
reset.c
sata.c
smbus.c
smbus.h
smi.c
smihandler.c haswell: remove GPIO60 memory reset gate on S3 transition 2013-03-14 06:36:21 +01:00
spi.c haswell: remove explicit pcie config accesses 2013-03-14 06:35:48 +01:00
usb_debug.c
usb_ehci.c
watchdog.c