Go to file
Tim Wawrzynczak 56adcc8fb7 mb/google/brya: Add HANG_DETECT host event to EC S0ix wake mask
The brya EC supports S0ix hang detection, but it was not enabled in
coreboot as well, masking that event out of S0ix, therefore add it in to
the EC S0ix wake mask.

TEST=After EC prints "Warning: Detected sleep hang! Waking host up!",
the host actually wakes up

Change-Id: I2c699114abcd9a045a41858c731e4b6fe99d3000
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-07-05 10:46:48 +00:00
3rdparty Update vboot submodule to upstream main 2021-07-01 09:38:12 +00:00
Documentation src: Consolidate x86_64 support Kconfig 2021-07-02 08:19:21 +00:00
LICENSES
configs src: Consolidate x86_64 support Kconfig 2021-07-02 08:19:21 +00:00
payloads nvs: Add Chrome OS NVS (CNVS) information to coreboot tables 2021-06-18 18:38:14 +00:00
src mb/google/brya: Add HANG_DETECT host event to EC S0ix wake mask 2021-07-05 10:46:48 +00:00
tests helpers: Introduce retry macro 2021-06-26 10:09:06 +00:00
util util/cbfstool: Allow setting alignment for payload 2021-07-02 23:14:33 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
.editorconfig
.gitignore
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-09 17:20:50 +00:00
.gitreview
AUTHORS
COPYING
MAINTAINERS Revert "src/mainboard: Add Star Labs labtop series" 2021-06-04 18:52:32 +00:00
Makefile tests: improve code coverage support 2021-05-19 19:56:02 +00:00
Makefile.inc option: Introduce `CMOS_LAYOUT_FILE` Kconfig symbol 2021-05-18 11:43:49 +00:00
README.md
gnat.adc
toolchain.inc toolchain.inc: copy architecture specific CFLAGS to GCC_ADAFLAGS 2021-07-01 09:43:54 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.