coreboot-kgpe-d16/util/nvramtool
Elyes HAOUAS 2119d0ba43 treewide: Capitalize 'CMOS'
Change-Id: I1d36e554618498d70f33f6c425b0abc91d4fb952
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38928
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Peter Lemenkov <lemenkov@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-02-24 14:10:00 +00:00
..
accessors util/*: more typo fixes 2020-01-30 13:47:49 +00:00
cli treewide: Capitalize 'CMOS' 2020-02-24 14:10:00 +00:00
COPYING
ChangeLog
DISCLAIMER
Makefile util/*/Makefile: Rename -W to -Wextra 2019-07-23 09:10:47 +00:00
Makefile.inc util/nvramtool: Create nvramtool object directories earlier 2020-01-20 14:31:29 +00:00
README
cbfs.c
cbfs.h util/*: more typo fixes 2020-01-30 13:47:49 +00:00
cmos_lowlevel.c
cmos_lowlevel.h
cmos_ops.c util: change coreboot to lowercase 2017-06-27 18:26:01 +00:00
cmos_ops.h
common.c util/nvramtool: Mark out_of_memory() as noreturn 2019-07-07 20:55:59 +00:00
common.h util/nvramtool: Mark out_of_memory() as noreturn 2019-07-07 20:55:59 +00:00
compute_ip_checksum.c
coreboot_tables.h util/nvramtool: Fix typos & remove unneeded whitespace 2018-08-27 22:41:57 +00:00
description.md util: Add description.md to each util 2018-07-26 13:26:50 +00:00
hexdump.c
hexdump.h
input_file.c
input_file.h
ip_checksum.h
layout.c treewide: Capitalize 'CMOS' 2020-02-24 14:10:00 +00:00
layout.h
lbtable.c util: change coreboot to lowercase 2017-06-27 18:26:01 +00:00
lbtable.h
nvramtool.spec
reg_expr.c
reg_expr.h
win32mmap.c

README

Summary of Operation
--------------------
nvramtool is a utility for reading/writing coreboot parameters and
displaying information from the coreboot table.  It is intended for x86-based
systems (both 32-bit and 64-bit) that use coreboot.

The coreboot table resides in low physical memory, and may be accessed
through the /dev/mem interface.  It is created at boot time by coreboot, and
contains various system information such as the type of mainboard in use.  It
specifies locations in the CMOS (nonvolatile RAM) where the coreboot
parameters are stored.

For information about coreboot, see https://www.coreboot.org/.

Ideas for Future Improvements
-----------------------------
1.  Move the core functionality of this program into a shared library.
2.  Consider adding options for displaying other BIOS-provided information
    such as the MP table, ACPI table, PCI IRQ routing table, etc.