57686f8485
The amd_mtrr.c file contains a copy of the fixed MTRR algorithm. However, the AMD code needs to handle the RdMem and WrMem attribute bits in the fixed MTRR MSRs. Instead of duplicating the code with the one slight change introduce a Kconfig option, X86_AMD_FIXED_MTRRS, which indicates that the RdMem and WrMem fields need to be handled for writeback fixed MTRR ranges. The order of how the AMD MTRR setup routine is maintained by providing a x86_setup_fixed_mtrrs_no_enable() function which does not enable the fixed MTRRs after setting them up. All Kconfig files which had a Makefile that included amd/mtrr in the subdirs-y now have a default X86_AMD_FIXED_MTRRS selection. There may be some overlap with the agesa and socket code, but I didn't know the best way to tease out the interdependency. Change-Id: I256d0210d1eb3004e2043b46374dcc0337432767 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2866 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
37 lines
578 B
Text
37 lines
578 B
Text
config CPU_AMD_SOCKET_ASB2
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bool
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select CPU_AMD_MODEL_10XXX
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select HT3_SUPPORT
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select PCI_IO_CFG_EXT
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select CACHE_AS_RAM
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select X86_AMD_FIXED_MTRRS
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config CPU_SOCKET_TYPE
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hex
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default 0x13
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depends on CPU_AMD_SOCKET_ASB2
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config EXT_RT_TBL_SUPPORT
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bool
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default n
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depends on CPU_AMD_SOCKET_ASB2
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config EXT_CONF_SUPPORT
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bool
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default n
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depends on CPU_AMD_SOCKET_ASB2
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config CBB
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hex
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default 0x0
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depends on CPU_AMD_SOCKET_ASB2
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config CDB
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hex
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default 0x18
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depends on CPU_AMD_SOCKET_ASB2
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config XIP_ROM_SIZE
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hex
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default 0x80000
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depends on CPU_AMD_SOCKET_ASB2
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