bae9f85ddb
This commit adds support for describing USB ports in devicetree.cb.
It allows a USB port location to be described in the tree with
configuration information, and ACPI code to be generated that
provides this information to the OS.
A new scan_usb_bus() is added that will scan bridges for devices so
a tree of ports and hubs can be created.
The device address is computed with a 'port type' and a 'port id'
which is flexible for SOC to handle depending on their specific USB
setup and allows USB2 and USB3 ports to be described separately.
For example a board may have devices on two ports, one with a USB2
device and one with a USB3 device, both of which are connected to an
xHCI controller with a root hub:
xHCI
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RootHub
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USB2[0] USB3[2]
device pci 14.0 on
chip drivers/usb/acpi
register "name" = ""Root Hub""
device usb 0.0 on
chip drivers/usb/acpi
register "name" = ""USB 2.0 Port 0""
device usb 2.0 on end
end
chip drivers/usb/acpi
register "name" = ""USB 3.0 Port 2""
device usb 3.2 on end
end
end
end
end
Change-Id: I64e6eba503cdab49be393465b535e139a8c90ef4
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/26169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
76 lines
2.6 KiB
Text
Executable file
76 lines
2.6 KiB
Text
Executable file
%{
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/*
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* sconfig, coreboot device tree compiler
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*
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* Copyright (C) 2010 coresystems GmbH
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* written by Patrick Georgi <patrick@georgi-clan.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "sconfig.h"
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int yylex();
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void yyerror(const char *s);
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static struct device *cur_parent, *cur_bus;
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%}
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%union {
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struct device *device;
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char *string;
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int number;
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}
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%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI USB MMIO
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%%
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devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ;
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chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ;
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devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | /* empty */ ;
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chip: CHIP STRING /* == path */ {
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$<device>$ = new_chip(cur_parent, cur_bus, $<string>2);
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cur_parent = $<device>$;
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}
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chipchildren END {
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cur_parent = $<device>3->parent;
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fold_in($<device>3);
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add_header($<device>3);
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};
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device: DEVICE BUS NUMBER /* == devnum */ BOOL {
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$<device>$ = new_device(cur_parent, cur_bus, $<number>2, $<string>3, $<number>4);
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cur_parent = $<device>$;
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cur_bus = $<device>$;
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}
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devicechildren END {
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cur_parent = $<device>5->parent;
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cur_bus = $<device>5->bus;
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fold_in($<device>5);
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alias_siblings($<device>5->children);
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};
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resource: RESOURCE NUMBER /* == resnum */ EQUALS NUMBER /* == resval */
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{ add_resource(cur_parent, $<number>1, strtol($<string>2, NULL, 0), strtol($<string>4, NULL, 0)); } ;
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registers: REGISTER STRING /* == regname */ EQUALS STRING /* == regval */
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{ add_register(cur_parent, $<string>2, $<string>4); } ;
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subsystemid: SUBSYSTEMID NUMBER NUMBER
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 0); };
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subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 1); };
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ioapic_irq: IOAPIC_IRQ NUMBER PCIINT NUMBER
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{ add_ioapic_info(cur_parent, strtol($<string>2, NULL, 16), $<string>3, strtol($<string>4, NULL, 16)); };
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%%
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