coreboot-kgpe-d16/util/uio_usbdebug/uio_usbdebug_intel.c
Patrick Georgi a73b93157f tree: drop last paragraph of GPL copyright header
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.

This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.

Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-31 21:37:39 +01:00

63 lines
1.6 KiB
C

/*
* This file is part of uio_usbdebug
*
* Copyright (C) 2013 Nico Huber <nico.h@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pci_ehci.h>
#include <console/usb.h>
extern void *ehci_bar;
pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx)
{
u32 class;
pci_devfn_t dev;
#if CONFIG_HAVE_USBDEBUG_OPTIONS
if (hcd_idx==2)
dev = PCI_DEV(0, 0x1a, 0);
else
dev = PCI_DEV(0, 0x1d, 0);
#else
dev = PCI_DEV(0, 0x1d, 7);
#endif
class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
#if CONFIG_HAVE_USBDEBUG_OPTIONS
if (class != PCI_EHCI_CLASSCODE) {
/* If we enter here before RCBA programming, EHCI function may
* appear with the highest function number instead.
*/
dev |= PCI_DEV(0, 0, 7);
class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8;
}
#endif
if (class != PCI_EHCI_CLASSCODE)
return 0;
return dev;
}
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
{
/* claim usb debug port */
const unsigned long dbgctl_addr =
((unsigned long)ehci_bar) + CONFIG_EHCI_DEBUG_OFFSET;
write32(dbgctl_addr, read32(dbgctl_addr) | (1 << 30));
}
void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
{
}