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Furquan Shaikh 582a0e2dbc soc/intel/common/uart: Use simple(_s_) variants of PCI functions 
This change updates various uart_* functions to use simple(_s_)
variants of PCI functions. This is done for a few reasons:

* __SIMPLE_DEVICE__ check can be dropped since the same data type can
  be used in early stages and ramstage.
* Removes the requirement on early stage to walk the device tree to
  get access to the device structure. This allows linker-based device
  tree optimizations for early stages.

As part of this change, uart_get_device() is refactored and a new
function uart_console_get_devfn() is added which returns pci_devfn_t
in MMCONF format. It is then used directly by the _s_ variants of PCI
functions.

Change-Id: I344037828118572ae5eb27c82c496d5e7a508a53
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49213
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-01-11 07:41:35 +00:00
3rdparty amd_blobs: Advance pointer for picasso FSP 0x25 2021-01-08 15:18:07 +00:00
configs configs: Add a weird config for Asus P8Z77-V LX2 2020-12-14 21:01:17 +00:00
Documentation Documentation: Add Beaglebone Black documentation 2020-12-24 08:30:28 +00:00
LICENSES
payloads payloads/external: Update cbfs-ints with CONFIG_UPDATE_IMAGE 2021-01-08 08:09:08 +00:00
src soc/intel/common/uart: Use simple(_s_) variants of PCI functions 2021-01-11 07:41:35 +00:00
tests tests: Add lib/fmap-test test case 2021-01-08 08:26:26 +00:00
util superiotool/nuvoton: Set NCT6791D GPIO inputs to NANA 2021-01-10 15:49:24 +00:00
.checkpatch.conf
.clang-format
.editorconfig
.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
.gitmodules 3rdparty: Add STM as a submodule 2020-09-30 10:17:03 +00:00
.gitreview
AUTHORS
COPYING
gnat.adc
MAINTAINERS MAINTAINERS: Add maintainer for ACPI 2021-01-04 23:13:18 +00:00
Makefile Makefile: Add $(xcompile) to specify where to write xcompile 2020-12-23 03:40:35 +00:00
Makefile.inc drivers/vpd: Add VPD region to default FMAP when selected 2021-01-04 23:12:35 +00:00
README.md
toolchain.inc

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.