d91d2df2cc
Picasso's BERT region should not have been moved to cbmem in commit
901cb9c "soc/amd/picasso: Move BERT region to cbmem". This
causes an error of "APEI: Can not request [] for APEI BERT registers.
FSP has been modified to set aside a requested region size for BERT,
simiar to TSEG. Remove the cbmem reservation and locate the region
by searching for the HOB.
BUG=b:136987699
TEST=Check that BERT is allocated
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I20e99390141986913dd45c2074aa184e992c8ebb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42530
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
104 lines
2.1 KiB
C
104 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#define __SIMPLE_DEVICE__
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#include <assert.h>
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#include <stdint.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <cpu/amd/msr.h>
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#include <arch/bert_storage.h>
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#include <memrange.h>
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#include <fsp/util.h>
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#include <FspGuids.h>
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#include <soc/memmap.h>
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/*
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* For data stored in TSEG, ensure TValid is clear so R/W access can reach
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* the DRAM when not in SMM.
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*/
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static void clear_tvalid(void)
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{
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msr_t hwcr = rdmsr(HWCR_MSR);
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msr_t mask = rdmsr(SMM_MASK_MSR);
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int tvalid = !!(mask.lo & SMM_TSEG_VALID);
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if (hwcr.lo & SMM_LOCK) {
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if (!tvalid) /* not valid but locked means still accessible */
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return;
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printk(BIOS_ERR, "Error: can't clear TValid, already locked\n");
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return;
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}
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mask.lo &= ~SMM_TSEG_VALID;
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wrmsr(SMM_MASK_MSR, mask);
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}
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void smm_region(uintptr_t *start, size_t *size)
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{
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static int once;
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struct range_entry tseg;
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int status;
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*start = 0;
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*size = 0;
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status = fsp_find_range_hob(&tseg, AMD_FSP_TSEG_HOB_GUID.b);
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if (status < 0) {
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printk(BIOS_ERR, "Error: unable to find TSEG HOB\n");
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return;
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}
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*start = (uintptr_t)range_entry_base(&tseg);
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*size = range_entry_size(&tseg);
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if (!once) {
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clear_tvalid();
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once = 1;
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}
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}
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void bert_reserved_region(void **start, size_t *size)
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{
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struct range_entry bert;
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int status;
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*start = NULL;
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*size = 0;
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status = fsp_find_range_hob(&bert, AMD_FSP_BERT_HOB_GUID.b);
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if (status < 0) {
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printk(BIOS_ERR, "Error: unable to find BERT HOB\n");
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return;
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}
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*start = (void *)(uintptr_t)range_entry_base(&bert);
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*size = range_entry_size(&bert);
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}
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void memmap_stash_early_dram_usage(void)
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{
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struct memmap_early_dram *e;
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e = cbmem_add(CBMEM_ID_CB_EARLY_DRAM, sizeof(*e));
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if (!e)
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die("ERROR: Failed to stash early dram usage!\n");
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e->base = (uint32_t)(uintptr_t)_early_reserved_dram;
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e->size = REGION_SIZE(early_reserved_dram);
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}
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const struct memmap_early_dram *memmap_get_early_dram_usage(void)
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{
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struct memmap_early_dram *e = cbmem_find(CBMEM_ID_CB_EARLY_DRAM);
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if (!e)
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die("ERROR: Failed to read early dram usage!\n");
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return e;
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}
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