coreboot-kgpe-d16/src/arch/riscv
Ronald G. Minnich 5965cba3dc RISCV: Clean up the common architectural code
This version of coreboot successfully starts a Harvey (Plan 9) kernel as a payload,
entering main() with no supporting assembly code for startup. The Harvey port
is not complete so it just panics but ... it gets started.

We provide a standard payload function that takes a pointer argument
and makes the jump from machine to supervisor mode;
the days of kernels running in machine mode are over.

We do some small tweaks to the virtual memory code. We temporarily
disable two functions that won't work on some targets as register
numbers changed between 1.7 and 1.9. Once lowrisc catches up
we'll reenable them.

We add the PAGETABLES to the memlayout.ld and use _pagetables in the virtual
memory setup code.

We now use the _stack and _estack from memlayout so we know where things are.
As time goes on maybe we can kill all the magic numbers.

Change-Id: I6caadfa9627fa35e31580492be01d4af908d31d9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/17058
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-10-24 20:25:04 +02:00
..
include RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00
boot.c RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00
bootblock.S RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00
id.ld arch/riscv: Add missing license headers 2016-01-18 02:14:03 +01:00
id.S src/arch/riscv/id.S: Don't hardcode the strings 2016-08-04 17:17:38 +02:00
Kconfig riscv: Use the generic src/lib/bootblock.c 2016-10-15 00:26:28 +02:00
Makefile.inc RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00
misc.c arch/riscv: Add missing license headers 2016-01-18 02:14:03 +01:00
payload.S RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00
prologue.inc tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
sbi.S arch/riscv: Implement the SBI again 2016-08-23 23:47:01 +02:00
stages.c arch: remove stage_exit() 2016-02-11 23:12:06 +01:00
tables.c lib: add common write_tables() implementation 2016-04-21 20:49:05 +02:00
trap_handler.c arch/riscv: In trap handler, don't print SP twice 2016-10-18 18:42:11 +02:00
trap_util.S arch/riscv: Set the stack pointer upon trap entry 2016-08-15 18:25:32 +02:00
virtual_memory.c RISCV: Clean up the common architectural code 2016-10-24 20:25:04 +02:00