coreboot-kgpe-d16/src
Gabe Black 59ebc6e919 tegra124: Add stack related config options to the Kconfig.
Otherwise the stack ends up down at 0 and has 0 bytes.

Change-Id: I0e3c80a0c5b0180d95819ab44829c2a0b527a54d
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171015
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 3e69a477474697bcbc40762ec166e8a515d8b0c2)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6619
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-12 23:18:33 +02:00
..
arch armv7/Makefile.inc, cpu/Makefile.inc: align output of printf 2014-08-12 09:02:43 +02:00
console src/console/Kconfig: Fix choice for showing POST codes on console 2014-07-30 20:34:08 +02:00
cpu exynos5420: minor clean-up memory related stuff 2014-08-12 22:20:23 +02:00
device device/oprom/realmode: Sanitize header inclusion 2014-08-08 03:32:13 +02:00
drivers drivers: Add I2C TPM driver to coreboot 2014-08-10 22:25:48 +02:00
ec lenovo/h8: Remove useless smi.h include. 2014-08-11 00:46:33 +02:00
include coreboot_tables: reduce redundant data structures 2014-08-10 22:23:19 +02:00
lib coreboot classes: Add dynamic classes to coreboot 2014-08-11 15:42:20 +02:00
mainboard gm45: Allow coexistance with ME firmware. 2014-08-12 22:28:53 +02:00
northbridge gm45: Move S3 detection to enable stage. 2014-08-12 22:43:53 +02:00
soc tegra124: Add stack related config options to the Kconfig. 2014-08-12 23:18:33 +02:00
southbridge gm45: Move S3 detection to enable stage. 2014-08-12 22:43:53 +02:00
superio superio/smsc/sio1036: Clean up RAMstage superio.c component 2014-08-09 10:06:13 +02:00
vendorcode vendorcode/intel/fsp/baytrail/absf: add Minnow Max absf files 2014-08-11 20:52:12 +02:00
Kconfig drivers: Add I2C TPM driver to coreboot 2014-08-10 22:25:48 +02:00