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Ronald G. Minnich 5a1af7b877 There was a missing addition of the size of the .notes.pinfo
section header which could lead to corrupted malloc arena. 

Also, make cbfstool always build with debugging on. Performance
is not an issue here. Don't strip it either. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17 15:35:08 +00:00
documentation Fix clean rules for the tex files. 2009-09-04 19:34:43 +00:00
payloads Update Coreinfo to use TAG_FORWARD in tables. 2009-08-24 15:25:11 +00:00
src This is a patch for killing IPMI on the s1850 -- or at least geting the BMC 2009-09-17 00:28:29 +00:00
targets This is an otherwise dead platform. I'm just committing the basics that 2009-09-15 23:38:27 +00:00
util There was a missing addition of the size of the .notes.pinfo 2009-09-17 15:35:08 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile Add Kconfig support for PCI option ROMS. 2009-08-28 14:36:12 +00:00
NEWS Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
README Improvements for the coreboot v2 README: 2009-04-17 17:11:39 +00:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary
BIOS you can find in most of today's computers.

It performs just a little bit of hardware initialization and then executes
one of many possible payloads, e.g. a Linux kernel or a bootloader.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make
 * python
 * perl

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Documentation for details.


Testing coreboot Without Modifying Your Hardware
-------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files (mostly those derived from the Linux kernel) are licensed under
the "GPL, version 2". For some parts, which were derived from other projects,
other (GPL-compatible) licenses may apply. Please check the individual
source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.