5d0893adce
The purpose of pci_early_bridge_init() is to temporarily configure PCIe rootport (or PCI bridge) on bus 0 to configure PCI device BARs on the secondary bus. Currently used and tested only with UART_OXPCIE. Since those BARs do not reset on stage changes, it is not necessary to redo those steps for verstage or postcar. Note that the option does not really work with many of the later platforms where PCIe pins/links/lanes are configured late in FSP-M or similar blob. Change-Id: I148f44c76c61edcfd8ab1c8c531cd2e6ca343130 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
80 lines
1.6 KiB
C
80 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <commonlib/helpers.h>
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#include <console/console.h>
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#include <console/uart.h>
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#include <console/streams.h>
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#include <device/pci.h>
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#include <option.h>
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#include <version.h>
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/* Mutable console log level only allowed when RAM comes online. */
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#define CONSOLE_LEVEL_CONST !ENV_STAGE_HAS_DATA_SECTION
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static int console_inited;
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static int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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static inline int get_log_level(void)
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{
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if (console_inited == 0)
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return -1;
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if (CONSOLE_LEVEL_CONST)
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return get_console_loglevel();
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return console_loglevel;
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}
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static inline void set_log_level(int new_level)
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{
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if (CONSOLE_LEVEL_CONST)
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return;
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console_loglevel = new_level;
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}
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static void init_log_level(void)
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{
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int debug_level = get_console_loglevel();
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if (CONSOLE_LEVEL_CONST)
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return;
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get_option(&debug_level, "debug_level");
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set_log_level(debug_level);
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}
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int console_log_level(int msg_level)
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{
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int log_level = get_log_level();
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if (log_level < 0)
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return CONSOLE_LOG_NONE;
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if (msg_level <= log_level)
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return CONSOLE_LOG_ALL;
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if (CONFIG(CONSOLE_CBMEM) && (msg_level <= BIOS_DEBUG))
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return CONSOLE_LOG_FAST;
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return 0;
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}
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asmlinkage void console_init(void)
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{
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init_log_level();
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if (CONFIG(DEBUG_CONSOLE_INIT))
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console_inited = 1;
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if (CONFIG(EARLY_PCI_BRIDGE) && (ENV_BOOTBLOCK || ENV_ROMSTAGE))
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pci_early_bridge_init();
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console_hw_init();
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console_inited = 1;
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printk(BIOS_NOTICE, "\n\ncoreboot-%s%s %s " ENV_STRING " starting (log level: %i)...\n",
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coreboot_version, coreboot_extra_version, coreboot_build,
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get_log_level());
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}
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