coreboot-kgpe-d16/util/superiotool
Frank Rysanek c0c620e74a superiotool: add CR dump for W83627UHG = NCT6627UD
This commit adds "register dump capability" to
superiotool for a specific chip by Winbond/Nuvoton:
the W83627UHG   AKA   NCT6627UD  (same chip, different package).
In other words, it fills in the "CR map" definitions in winbond.c,
which so far have been void for this chip.
-
superiotool r4.0-3976-g190011e
Found Winbond W83627UHG = NCT6627UD (id=0xa2, rev=0x32) at 0x2e
Register dump:
idx 02 20 21 22 23 24 25 26  27 28 29 2a 2b 2c 2d 2e  2f
val ff a2 32 ff f0 44 00 00  ff 00 00 00 00 03 00 00  ff
def 00 a2 NA ff f0 MM 00 MM  RR 00 00 00 00 02 00 00  00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1 f2  f4 f5
val 00 00 00 00 02 8e 00 ff  00 00
def 01 03 f0 06 02 8e 00 ff  00 00
LDN 0x01 (Parallel port)
idx 30 60 61 70 74 f0
val 00 03 78 0c 04 3f
def 01 03 78 07 04 3f
LDN 0x02 (UART A)
idx 30 60 61 70 f0
val 01 03 f8 04 00
def 01 03 f8 04 00
LDN 0x03 (UART B)
idx 30 60 61 70 f0 f1
val 01 02 f8 03 00 44
def 01 02 f8 03 00 00
LDN 0x05 (Keyboard)
idx 30 60 61 62 63 70 72 f0
val 01 00 60 00 64 01 0c 82
def 01 00 60 00 64 01 0c 83
LDN 0x06 (UART C)
idx 30 60 61 70 f0
val 01 03 e8 05 80
def 01 03 e0 04 00
LDN 0x07 (GPIO 3, GPIO 4)
idx 30 e0 e1 e2 e3 e4 e5 e6  e7
val 04 ff ff ff ff ff ff ff  ff
def 00 ff 00 00 00 ff 00 00  00
LDN 0x08 (WDTO#, PLED, GPIO 5,6 & GPIO Base Address)
idx 30 60 61 e0 e1 e2 e3 e4  e5 e6 e7 f5 f6 f7
val 01 00 00 ff ff ff ff ff  ff ff ff 02 00 00
def 02 00 00 ff 00 00 00 ff  1f 00 00 00 00 00
LDN 0x09 (GPIO 1, GPIO 2 and SUSLED)
idx 30 e0 e1 e2 e3 e4 e5 e6  e7 f3
val 02 ff ff ff ff 00 ff 00  00 00
def 00 ff 00 00 00 ff 00 00  00 00
LDN 0x0a (ACPI)
idx 30 70 e0 e1 e2 e3 e4 e5  e6 e7 e8 e9 f2 f3 f4 f6  f7 fe
val 01 00 01 00 0a 00 00 00  0c 00 09 00 01 00 00 00  00 00
def 00 00 01 00 ff 08 00 00  1c 00 RR RR 3e 00 00 00  00 00
LDN 0x0b (Hardware monitor)
idx 30 60 61 70 f0 f1 f2
val 01 02 48 00 81 ff 81
def 00 00 00 00 RR RR 00
LDN 0x0c (PECI, SST)
idx e0 e1 e2 e3 e4 e5 e6 e7  e8 f1 f2 f3 fe ff
val 00 48 48 48 48 00 00 00  00 4c 50 10 23 5a
def 00 48 48 48 48 00 RR RR  00 48 50 10 23 5a
LDN 0x0d (UART D)
idx 30 60 61 70 f0
val 00 00 00 00 00
def 00 02 e0 03 00
LDN 0x0e (UART E)
idx 30 60 61 70 f0
val 00 00 00 00 80
def 00 03 e8 04 00
LDN 0x0f (UART F)
idx 30 60 61 70 f0
val 01 02 38 0a 00
def 00 02 e8 03 00

Change-Id: I834f8767b29f3148f353004edb22cfd7db5ddd56
Signed-off-by: Frank Rysanek <Frantisek.Rysanek@post.cz>
Reviewed-on: http://review.coreboot.org/3027
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-04-22 17:07:13 +02:00
..
COPYING Add a copy of the GPL (trivial). 2007-10-03 18:56:51 +00:00
Makefile superiotool: Allow to override Makefile variables `CC`, `INSTALL` and `PREFIX` 2013-03-29 21:32:48 +01:00
README libpayload, superiotool: README: Prepend `coreboot/` to path of change directory line 2013-04-04 17:22:15 +02:00
ali.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
amd.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
fintek.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
infineon.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ite.c superiotool: Add support for the IT8728F Super I/O 2013-03-17 23:20:38 +01:00
nsc.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
nuvoton.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
pci.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
serverengines.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
smsc.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
superiotool.8 Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
superiotool.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
superiotool.h GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via.c GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
winbond.c superiotool: add CR dump for W83627UHG = NCT6627UD 2013-04-22 17:07:13 +02:00

README

-------------------------------------------------------------------------------
Superiotool README
-------------------------------------------------------------------------------

Superiotool is a user-space utility which can

 - detect which Super I/O chip is soldered onto your mainboard,

 - at which configuration port it's located (usually 0x2e or 0x4e), and

 - dump all register contents of the Super I/O chip, together with the
   default values as per datasheet (to make comparing the values easy).

It is mainly used for coreboot development purposes (see coreboot.org
for details on coreboot), but it may also be useful for other things.


Installation
------------

 $ git clone http://review.coreboot.org/p/coreboot.git

 $ cd coreboot/util/superiotool

Optional: Edit the Makefile and set 'CONFIG_PCI = no' if you don't want to
support PCI-attached "Super I/Os" (which needs libpci-dev) such as the
VIA VT82686A/B southbridge with integrated Super I/O functionality.

 $ make

 $ sudo make install


Usage
-----

Please read the superiotool(8) manpage or type 'superiotool --help'.

Per default (no options) superiotool will just probe for a Super I/O
and print its vendor, name, ID, revision, and config port.

Typical usage of superiotool:

 - Probe/detect the Super I/O in your mainboard:

   $ superiotool

 - Register dump as table of hex-values of the Super I/O (if detected):

   $ superiotool -d


Supported Super I/O Chips
-------------------------

Please see http://coreboot.org/Superiotool#Supported_devices, or type

 $ superiotool -l

There's also a collection of sample register dumps from various Super I/O
chips on that web page. Please send further register dumps (either from a
proprietary BIOS and/or from coreboot) to the coreboot mailing list
(http://coreboot.org/Mailinglist).


Website and Mailing List
------------------------

The main website is http://coreboot.org/Superiotool.

For additional information, patches, and discussions, please join the
coreboot mailing list at http://coreboot.org/Mailinglist, where most
superiotool developers are subscribed.


Copyright and License
---------------------

Superiotool is copyrighted by a number of individual developers. Please
refer to the respective source code files for details.

It is licensed under the terms of the GNU General Public License (GPL),
either version 2 of the license, or (at your option) any later version.


Contributors
------------

Anders Juel Jensen <andersjjensen@gmail.com>
Andriy Gapon <avg@icyb.net.ua>
Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com>
Bingxun Shi <bingxunshi@gmail.com>
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
David Bartley <dtbartle@csclub.uwaterloo.ca>
David Hendricks <david.hendricks@gmail.com>
François-Regis Vuillemin <coreboot@miradou.com>
Frieder Ferlemann <Frieder.Ferlemann@web.de>
Idwer Vollering <idwer_v@hotmail.com>
Ioannis Barkas <tripl3fault@yahoo.com>
Josh Profitt <zorn169@gmail.com>
Luc Verhaegen <libv@skynet.be>
Michael Gold <mgold@ncf.ca>
Michał Mirosław <mirq-linux@rere.qmqm.pl>
Nikos Barkas <levelwol@gmail.com>
Rasmus Wiman <rasmus@wiman.org>
Robinson P. Tryon <bishop.robinson@gmail.com>
Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Ronald Minnich <rminnich@gmail.com>
Sean Young <sean@mess.org>
Stefan Reinauer <stepan@coresystems.de>
Tom Sylla <tsylla@gmail.com>
Ulf Jordan <jordan@chalmers.se>
Urja Rannikko <urjaman@gmail.com>
Uwe Hermann <uwe@hermann-uwe.de>
Ward Vandewege <ward@gnu.org>