5d7df71cfe
As the audio card needs 1.8V I2C operation. This patch adds entry into devicetree.cb to set I2C port 4 operate at 1.8V. TEST=Built & booted lars board. Verified that I2C port 4 is operating at 1.8V level Change-Id: Ia77841a26d024785d53251ca4b17afcf77f36a5b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e431e7acd85f6d7bf9d47f54ed41c48b8276071c Original-Change-Id: Iccc85a5e3bbf2b5362665036e1294a6635e38fbe Original-Signed-off-by: David Wu <David_Wu@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/321000 Original-Commit-Ready: David Wu <david_wu@quantatw.com> Original-Tested-by: David Wu <david_wu@quantatw.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/13627 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> |
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.. | ||
acpi | ||
spd | ||
acpi_tables.c | ||
boardid.c | ||
car.c | ||
chromeos.c | ||
chromeos.fmd | ||
cmos.layout | ||
devicetree.cb | ||
dsdt.asl | ||
ec.c | ||
ec.h | ||
fadt.c | ||
gpio.h | ||
Kconfig | ||
Kconfig.name | ||
mainboard.c | ||
Makefile.inc | ||
pei_data.c | ||
ramstage.c | ||
romstage.c | ||
smihandler.c |