4141b47b07
Change-Id: I9c938b8a69479fae6b0eb99d1135f1caaf26d0e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10227 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <southbridge/intel/bd82x6x/nvs.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <southbridge/intel/bd82x6x/me.h>
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#include <northbridge/intel/sandybridge/sandybridge.h>
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#include <cpu/intel/model_206ax/model_206ax.h>
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/*
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* Change LED_POWER# (SIO GPIO 45) state based on sleep type.
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* The IO address is hardcoded as we don't have device path in SMM.
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*/
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#define SIO_GPIO_BASE_SET4 (0x730 + 3)
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#define SIO_GPIO_BLINK_GPIO45 0x25
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void mainboard_smi_sleep(u8 slp_typ)
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{
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u8 reg8;
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switch (slp_typ) {
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case 3:
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case 4:
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break;
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case 5:
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/* Turn off LED */
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reg8 = inb(SIO_GPIO_BASE_SET4);
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reg8 |= (1 << 5);
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outb(reg8, SIO_GPIO_BASE_SET4);
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break;
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}
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}
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