coreboot-kgpe-d16/src/mainboard/google/gru/sdram_configs.c
Julius Werner 5e6771b1cb google/gru: Add support for Gru rev1
This patch adds support for the Gru rev1 board. This board differs from
rev0 by no longer relying on the I2C backlight booster and requiring the
same ODT SDRAM settings as newer Kevin boards.

BRANCH=None
BUG=chrome-os-partner:55087
TEST=None

Change-Id: I1428760540a0aaaa0c02c6cb5b0981294ba4df33
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 8de7bcc78c6c48c251c85185e238cea7812f7a28
Original-Change-Id: I3cb49bc644190f35300e6c618b2934956fa88e5b
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/364624
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/16028
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-03 18:23:08 +02:00

84 lines
1.9 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/sdram.h>
#include <string.h>
#include <types.h>
static struct rk3399_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-lpddr3-hynix-4GB-200.inc"
/* 666MHz, enable odt 120o */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-666.inc"
/* 800MHz, enable odt 120o */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-800.inc"
/* 666MHz, disable odt */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-666-no-odt.inc"
/* 800MHz, disable odt */
#include "sdram_inf/sdram-lpddr3-hynix-4GB-800-no-odt.inc"
};
enum dram_speeds {
dram_200MHz = 0,
dram_666MHz = 1,
dram_800MHz = 2,
dram_666MHz_NO_ODT = 3,
dram_800MHz_NO_ODT = 4,
};
static enum dram_speeds get_sdram_index(void)
{
uint32_t id;
id = board_id();
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
switch (id) {
case 0:
case 1:
case 2:
return dram_200MHz;
case 3:
return dram_666MHz_NO_ODT;
default:
return dram_800MHz;
}
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))
switch (id) {
case 0:
return dram_800MHz_NO_ODT;
default:
return dram_800MHz;
}
}
const struct rk3399_sdram_params *get_sdram_config()
{
enum dram_speeds speed = get_sdram_index();
printk(BIOS_INFO, "Using SDRAM configuration for %d MHz\n",
sdram_configs[speed].ddr_freq / (1000 * 1000));
return &sdram_configs[speed];
}