a46a712610
In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.
The following command was used to convert all files.
$ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/'
[1] http://www.gnu.org/licenses/gpl-2.0.txt
Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
134 lines
3 KiB
C
134 lines
3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Ricardo Martins <rasmartins@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/pci_ids.h>
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#include <arch/pirq_routing.h>
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/* Platform IRQs */
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#define PIRQA 10
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#define PIRQB 10
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#define PIRQC 11
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#define PIRQD 11
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/* Links */
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#define L_PIRQN 0
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#define L_PIRQA 1
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#define L_PIRQB 2
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#define L_PIRQC 3
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#define L_PIRQD 4
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/* Bitmaps */
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#define B_LINKN (0)
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#define B_LINK0 (1 << PIRQA)
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#define B_LINK1 (1 << PIRQB)
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#define B_LINK2 (1 << PIRQC)
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#define B_LINK3 (1 << PIRQD)
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static const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus */
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0x00, /* Interrupt router bus */
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(0x0f << 3) | 0x0, /* Interrupt router dev */
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(B_LINK0 | B_LINK1 | B_LINK2 | B_LINK3),/* IRQs devoted exclusively to PCI usage */
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PCI_VENDOR_ID_AMD, /* Vendor */
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PCI_DEVICE_ID_AMD_CS5536_ISA, /* Device */
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0, /* Miniport */
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{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
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0x27, /* Checksum */
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{
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[0] = { /* Host bridge */
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.slot = 0x00,
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.bus = 0x00,
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.devfn = (0x01 << 3) | 0x0,
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.irq = {
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[0] = {
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.link = L_PIRQA,
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.bitmap = B_LINK0
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},
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[1] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[2] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[3] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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}
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}
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},
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[1] = { /* ISA bridge */
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.slot = 0x00,
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.bus = 0x00,
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.devfn = (0x0f << 3) | 0x0,
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.irq = {
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[0] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[1] = {
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.link = L_PIRQB,
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.bitmap = B_LINK1
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},
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[2] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[3] = {
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.link = L_PIRQD,
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.bitmap = B_LINK3
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}
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}
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},
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[2] = { /* Ethernet */
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.slot = 0x00,
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.bus = 0x00,
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.devfn = (0x0e << 3) | 0x0,
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.irq = {
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[0] = {
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.link = L_PIRQD,
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.bitmap = B_LINK3
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},
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[1] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[2] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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},
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[3] = {
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.link = L_PIRQN,
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.bitmap = B_LINKN
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}
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}
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}
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr, &intel_irq_routing_table);
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}
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