ab95702f1e
This is a clone of the original Family 10h-compatible ASUS KFSN4-DRE board, modified for basic K8 support to allow for future K8 Socket F Opteron testing. TEST: Booted KFSN4-DRE with 1 Opteron 8222 processor KNOWN ISSUES: * Second CPU package fails to initialize AP This prevents use of a secondary CPU package * Second memory channel of at least CPU package #0 does not function (crash at CAR handoff) Change-Id: I591725babe685fa50a0d7473b17005fbd258056e Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12212 Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
68 lines
2.1 KiB
C
68 lines
2.1 KiB
C
/*
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* ACPI support
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* written by Stefan Reinauer <stepan@openbios.org>
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* (C) 2005 Stefan Reinauer
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*
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* Copyright 2005 AMD
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* 2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
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*
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* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
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*/
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#include <console/console.h>
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#include <string.h>
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#include <assert.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/smp/mpspec.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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/* APIC */
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unsigned long acpi_fill_madt(unsigned long current)
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{
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device_t dev;
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struct resource *res;
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(sysconf.sbdn + 0x1, 0));
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ASSERT(dev != NULL);
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
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CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS, res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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if (!IS_ENABLED(CONFIG_GENERATE_MP_TABLE)) {
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/* Copied from mptable.c */
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/* Enable interrupts for commonly used devices (USB, SATA, etc.) */
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pci_write_config32(dev, 0x7c, 0x0d800018);
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pci_write_config32(dev, 0x80, 0xd8002009);
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pci_write_config32(dev, 0x84, 0x00000001);
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}
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
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/* IRQ14 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 14, 14, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH);
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/* IRQ15 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 15, 15, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH);
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/* create all subtables for processors */
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/* acpi_create_madt_lapic_nmis returns current, not size. */
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current = acpi_create_madt_lapic_nmis(current,
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MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 1);
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return current;
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}
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