48a6c018bc
IASL version 20180927 and greater, detects Unnecessary/redundant uses of
the Offset() operator within a Field Unit list.
It then sends a remark "^ Unnecessary/redundant use of Offset"
example:
OperationRegion (OPR1, SystemMemory, 0x100, 0x100)
Field (OPR1)
{
Offset (0), // Never needed
FLD1, 32,
Offset (4), // Redundant, offset is already 4 (bytes)
FLD2, 8,
Offset (64), // OK use of Offset.
FLD3, 16,
}
We will have those remarks:
dsdt.asl 14: Offset (0),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
dsdt.asl 16: Offset (4),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
Change-Id: I260a79ef77025b4befbccc21f5999f89d90c1154
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43283
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
30 lines
890 B
Text
30 lines
890 B
Text
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Global variables */
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Name (PMOD, Zero) /* Interrupt Mode used by OS. Assume PIC. */
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/*
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* NOTE: The layout of the GNVS structure below must match the layout in
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* soc/amd/picasso/include/soc/nvs.h !!!
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*
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*/
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External (NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0x1000)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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/* Miscellaneous */
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PCNT, 8, // 0x00 - Processor Count
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LIDS, 8, // 0x01 - LID State
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PWRS, 8, // 0x02 - AC Power State
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CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console
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PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index
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GPEI, 64, // 0x0f - 0x16 - GPE Wake Source
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TMPS, 8, // 0x17 - Temperature Sensor ID
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TCRT, 8, // 0x18 - Critical Threshold
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TPSV, 8, // 0x19 - Passive Threshold
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/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
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Offset (0x100),
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#include <vendorcode/google/chromeos/acpi/gnvs.asl>
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}
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