coreboot-kgpe-d16/payloads/libpayload
Julius Werner 120aec0902 serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32
We have two drivers for a 100%-identical peripheral right now, mostly
because we couldn't come up with a good common name for it back when we
checked it in. That seems like a pretty silly reason in the long run.

Both Tegra and Rockchip SoCs contain UARTs that use the common 8250
register interface (at least for the very basic byte-per-byte transmit
and receive parts we care about), memory-mapped with a 32-bit register
stride. This patch combines them to a single 8250_mmio32 driver (which
also fixes a problem when booting Rockchip without serial enabled, since
that driver forgot to check for serial initialization when registering
its console drivers). The register accesses are done using readl/writel
(as Rockchip did before), since the registers are documented as 32-bit
length (with top 24 bits RAZ/WI), although the Tegra SoC doesn't enforce
APB accesses to have the full word length. Also fixed checkpatch stuff.

A day may come when we can also merge this driver into the (completely
different, with more complicated features and #ifdefs) 8250 driver for
x86 (which has MMIO support for 8-bit register stride only), both here
and in coreboot. But it is not this day. This day I just want to get rid
of a 99% identical file without expending too much effort.

BUG=None
TEST=Booted on Veyron_Pinky and Nyan_Blaze with and without serial
enabled, both worked fine (although Veyron has another kernel issue).

Change-Id: I85c004a75cc5aa7cb40098002d3e00a62c1c5f2d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e7959c19356d2922aa414866016540ad9ee2ffa8
Original-Change-Id: Ib84d00f52ff2c48398c75f77f6a245e658ffdeb9
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225102
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9387
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10 07:50:21 +02:00
..
arch arm: Dump additional fault registers in abort handlers 2015-04-08 09:28:37 +02:00
bin libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00
configs serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 2015-04-10 07:50:21 +02:00
crypto libpayload: Change CONFIG_* to CONFIG_LP_* in the kconfig. 2014-08-05 18:44:08 +02:00
curses libpayload/PDcurses: avoid NULL deref 2015-01-03 23:58:22 +01:00
drivers serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 2015-04-10 07:50:21 +02:00
gdb libpayload: Let GDB stub read/write memory with aligned MMIO words 2015-01-12 05:56:16 +01:00
include arm: Dump additional fault registers in abort handlers 2015-04-08 09:28:37 +02:00
libc libpayload: Add RAM code to sysinfo_t 2015-03-21 11:04:03 +01:00
libcbfs libpayload: cbfs: Fix ram_media map() error return value 2015-03-21 11:04:39 +01:00
liblzma LZMA: Add a version of ulzma which takes the input and output buffer sizes. 2014-08-10 22:29:51 +02:00
libpci libpayload: minor cleanups 2012-04-04 00:40:31 +02:00
sample libpayload: Fix missed CONFIG_ -> CONFIG_LP_ substitutions 2014-10-17 11:24:15 +02:00
tests libpayload: Change CONFIG_X86_SERIAL_CONSOLE to CONFIG_8250_SERIAL_CONSOLE 2014-08-28 01:40:48 +02:00
util libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00
Config.in serial: Combine Tegra and Rockchip UARTs to generic 8250_mmio32 2015-04-10 07:50:21 +02:00
Doxyfile
LICENSES libpayload: Introduce new Kconfig to explicitly allow GPL code 2015-01-09 07:06:27 +01:00
LICENSE_GPL libpayload: Introduce new Kconfig to explicitly allow GPL code 2015-01-09 07:06:27 +01:00
Makefile libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00
Makefile.inc libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00
README libpayload, superiotool: README: Prepend `coreboot/` to path of change directory line 2013-04-04 17:22:15 +02:00

README

-------------------------------------------------------------------------------
libpayload README
-------------------------------------------------------------------------------

libpayload is a minimal library to support standalone payloads
that can be booted with firmware like coreboot. It handles the setup
code, and provides common C library symbols such as malloc() and printf().

Note: This is _not_ a standard library for use with an operating system,
rather it's only useful for coreboot payload development!
See http://coreboot.org for details on coreboot.


Installation
------------

 $ git clone http://review.coreboot.org/p/coreboot.git

 $ cd coreboot/payloads/libpayload

 $ make menuconfig

 $ make

 $ sudo make install (optional, will install into /opt per default)

As libpayload is for 32bit x86 systems only, you might have to install the
32bit libgcc version, otherwise your payloads will fail to compile.
On Debian systems you'd do 'apt-get install gcc-multilib' for example.


Usage
-----

Here's an example of a very simple payload (hello.c) and how to build it:

 #include <libpayload.h>

 int main(void)
 {
     printf("Hello, world!\n");
     return 0;
 }

Building the payload using the 'lpgcc' compiler wrapper:

 $ lpgcc -o hello.elf hello.c

Please see the sample/ directory for details.


Website and Mailing List
------------------------

The main website is http://www.coreboot.org/Libpayload.

For additional information, patches, and discussions, please join the
coreboot mailing list at http://coreboot.org/Mailinglist, where most
libpayload developers are subscribed.


Copyright and License
---------------------

See LICENSES.