2ad598f3db
The intermediate base and length are not required in ASL. Change-Id: I0c72e2e4f7ec597adc16dbdec1fd7bbe4e41bfd6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51637 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
20 lines
536 B
Text
20 lines
536 B
Text
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Global ACPI memory region. This region is used for passing information
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* between coreboot (aka "the system bios"), ACPI, and the SMI handler.
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* Since we don't know where this will end up in memory at ACPI compile time,
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* we provide it runtime via NVBx and NVSx variables from acpigen.
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*/
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#if CONFIG(ACPI_SOC_NVS)
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External (GNVS, OpRegionObj)
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#endif
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#if CONFIG(ACPI_HAS_DEVICE_NVS)
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External (DNVS, OpRegionObj)
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#endif
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#if CONFIG(CHROMEOS_NVS)
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External (CNVS, OpRegionObj)
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#endif
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