60ec3656eb
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I1ea2eebfdd43610e42b4cf04409ec76c2e8b0042 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40082 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
36 lines
968 B
C
36 lines
968 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#include <boot/coreboot_tables.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "gpio.h"
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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struct lb_gpio chromeos_gpios[] = {
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{GPIO_EC_IN_RW, ACTIVE_HIGH,
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gpio_get(GPIO_EC_IN_RW), "EC in RW"},
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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int get_write_protect_state(void)
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{
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/* Read PCH_WP GPIO. */
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return gpio_get(GPIO_PCH_WP);
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}
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME),
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};
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void mainboard_chromeos_acpi_generate(void)
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{
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chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
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}
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