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Stefan Reinauer 617536e580 amd/gx2 + amd/lx: Fix shift overflow issue
gcc 6.1 complains that SMM_OFFSET << 8 is larger than the register
it is assigned to (rightly so):

src/northbridge/amd/gx2/northbridgeinit.c:196:23: error: result of
    '1077936128 << 8' requires 40 bits to represent, but 'int' only
    has 32 bits [-Werror=shift-overflow=]
  msr.lo = (SMM_OFFSET << 8) & 0xfff00000;
                       ^~

Change-Id: Ib0d669268202d222574abee335a6a65c8a255cc7
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14617
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-06 19:04:51 +02:00
3rdparty vboot: Update to current master to support S3 resume signalling 2016-02-29 20:19:06 +01:00
Documentation Documentation: x86 MTRR setup, TempRamExit and MTRR loading 2016-03-21 20:12:35 +01:00
payloads payload: Fix broken Linux kernel as payload 2016-05-04 12:23:57 +02:00
src amd/gx2 + amd/lx: Fix shift overflow issue 2016-05-06 19:04:51 +02:00
util util/cbfstool: fix x86 execute-in-place semantics for all fmd regions 2016-05-06 16:49:01 +02:00
.clang-format Provide coreboot coding style formalisation file for clang-format 2015-11-10 00:49:03 +01:00
.gitignore .gitignore: add build and libpayload dirs for nvramcui payload 2016-05-03 04:16:45 +02:00
.gitmodules git modules: rename git submodules to avoid hierarchies 2016-02-11 20:55:55 +01:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Add maintainer for Pineview & x4x chipsets & boards 2016-04-19 19:25:59 +02:00
Makefile Makefile: Update payload clean targets 2016-03-09 17:01:56 +01:00
Makefile.inc cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZE 2016-05-06 16:49:37 +02:00
README README: improve description of compiler requirements 2015-07-30 05:11:33 +02:00
toolchain.inc toolchain.inc: test IASL by version string instead of number 2016-03-04 16:36:25 +01:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.