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623368113c
The current arm64 MMU interface is difficult to use in pre-RAM environments. It is based on the memranges API which makes use of malloc(), and early stages usually don't have a heap. It is also built as a one-shot interface that requires all memory ranges to be laid out beforehand, which is a problem when existing areas need to change (e.g. after initializing DRAM). The long-term goal of this patch is to completely switch to a configure-as-you-go interface based on the mmu_config_range() function, similar to what ARM32 does. As a first step this feature is added side-by-side to the existing interface so that existing SoC implementations continue to work and can be slowly ported over one by one. Like the ARM32 version it does not garbage collect page tables that become unused, so repeated mapping at different granularities will exhaust the available table space (this is presumed to be a reasonable limitation for a firmware environment and keeps the code much simpler). Also do some cleanup, align comments between coreboot and libpayload for easier diffing, and change all error cases to assert()s. Right now the code just propagates error codes up the stack until it eventually reaches a function that doesn't check them anymore. MMU configuration errors (essentially just misaligned requests and running out of table space) should always be compile-time programming errors, so failing hard and fast seems like the best way to deal with them. BRANCH=None BUG=None TEST=Compile-tested rush_ryu. Booted on Oak and hacked MMU init to use mmu_config_range() insted of memranges. Confirmed that CRCs over all page tables before and after the change are equal. Change-Id: I93585b44a277c1d96d31ee9c3dd2522b5e10085b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f10fcba107aba1f3ea239471cb5a4f9239809539 Original-Change-Id: I6a2a11e3b94e6ae9e1553871f0cccd3b556b3e65 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/271991 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10304 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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| Documentation | ||
| payloads | ||
| src | ||
| util | ||
| .gitignore | ||
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| .gitreview | ||
| COPYING | ||
| MAINTAINERS | ||
| Makefile | ||
| Makefile.inc | ||
| README | ||
| toolchain.inc | ||
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.