e231949b78
- This is a reverse engineered re-implementation of refcode.elf on Bay Trail - Tested on GBYT4, should work everywhere as it's meant to behave exactly the same as the binary refcode Signed-off-by: Mate Kukri <kukri.mate@gmail.com> Change-Id: I91977c509022b0078804dc151d27296260e24bc4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43133 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
116 lines
3.2 KiB
C
116 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/mmio.h>
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#include <console/console.h>
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#include <cpu/x86/tsc.h>
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#include <device/pci.h>
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#include <delay.h>
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#include <soc/pci_devs.h>
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#include <soc/lpc.h>
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#include <soc/iosf.h>
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#include <soc/iomap.h>
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#include <soc/ramstage.h>
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#include <soc/modphy_table.h>
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#define IOSF_READ(op_read, port) \
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(IOSF_OPCODE(op_read) | IOSF_PORT(port))
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#define IOSF_WRITE(op_write, port) \
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(IOSF_OPCODE(op_write) | IOSF_PORT(port))
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static void program_modphy_table(struct modphy_entry *table)
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{
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u32 tmp;
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for (; table->port; ++table) {
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tmp = iosf_read_port(IOSF_READ(table->op_read, table->port), table->reg);
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iosf_write_port(IOSF_WRITE(table->op_write, table->port), table->reg,
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(tmp & table->mask) | table->value);
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}
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}
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static void gpio_sc_sdcard_workaround(void)
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{
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setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0));
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setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 2));
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clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 1));
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clrbits32((char *) IO_BASE_ADDRESS + 0x690, (1 << 3));
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udelay(100);
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clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0));
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udelay(100);
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write32((char *) IO_BASE_ADDRESS + 0x830, 0x78480);
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udelay(40);
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write32((char *) IO_BASE_ADDRESS + 0x830, 0x78080);
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setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 0));
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udelay(100);
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setbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 1));
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clrbits32((char *) IO_BASE_ADDRESS + 0x698, (1 << 2));
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clrsetbits32((char *) IO_BASE_ADDRESS + 0x690, 7, (1 << 0));
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}
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#define BUNIT_BALIMIT0 0x0b
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#define AUNIT_AVCCTL 0x21
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#define AUNIT_ACFCACV 0x60
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#define CUNIT_ACCESS_CTRL_VIOL 0x41
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#define CUINT_SSA_REGIONAL_TRUNKGATE_CTL 0x43
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#define TUNIT_CTL 0x03
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#define TUNIT_MISC_CTL 0x04
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static void ssa_safe_config(void)
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{
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u32 tmp;
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tmp = iosf_bunit_read(BUNIT_BALIMIT0);
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iosf_bunit_write(BUNIT_BALIMIT0, (tmp & 0xC0D0D0D0) | 0x1F2F2F2F);
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tmp = iosf_aunit_read(AUNIT_AVCCTL);
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iosf_aunit_write(AUNIT_AVCCTL, tmp | 0x80000100);
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tmp = iosf_aunit_read(AUNIT_ACFCACV);
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iosf_aunit_write(AUNIT_ACFCACV, tmp & 0x7FFFFFFF);
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tmp = iosf_cunit_read(CUNIT_ACCESS_CTRL_VIOL);
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iosf_cunit_write(CUNIT_ACCESS_CTRL_VIOL, tmp & 0x7FFFFFFF);
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iosf_cunit_write(CUINT_SSA_REGIONAL_TRUNKGATE_CTL, 0x70008);
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tmp = iosf_cpu_bus_read(TUNIT_CTL);
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iosf_cpu_bus_write(TUNIT_CTL, tmp | 0x110430);
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tmp = iosf_cpu_bus_read(TUNIT_MISC_CTL);
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iosf_cpu_bus_write(TUNIT_MISC_CTL, tmp | 0x40010);
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}
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#define R_PCH_PMC_MTPMC1 0xb0
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/*
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* Replacement for refcode.elf
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*/
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void baytrail_run_reference_code(void)
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{
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u32 tmp;
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size_t pollcnt;
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printk(BIOS_DEBUG, "ModPHY init entry\n");
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if (pci_read_config8(pcidev_on_root(LPC_DEV, LPC_FUNC), REVID) < RID_B_STEPPING_START) {
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printk(BIOS_DEBUG, "SOC A0/A1 ModPhy Table programming\n");
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program_modphy_table(reva0_modphy_table);
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} else {
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printk(BIOS_DEBUG, "SOC B0 and later ModPhy Table programming\n");
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program_modphy_table(revb0_modphy_table);
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}
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setbits32((char *) PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1, 8);
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for (pollcnt = 0; pollcnt < 10; ++pollcnt) {
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tmp = read32((char *) PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1);
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printk(BIOS_DEBUG, "Polling bit3 of R_PCH_PMC_MTPMC1 = %x\n", tmp);
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if (!(tmp & 8))
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break;
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}
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gpio_sc_sdcard_workaround();
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ssa_safe_config();
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printk(BIOS_DEBUG, "ModPHY init done\n");
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}
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