coreboot-kgpe-d16/src/soc
Fengquan Chen 62aa2bb784 soc/mediatek: preserve WDT reset reason for debugging
1. Disable external output reset signal in first WDT reset
   to preserve WDT original reset reason for WDT issue in kernel stage.
2. After preserved WDT reset reason, do fully reset again by sending
   external output reset signal.

BUG=b:194025005
TEST=boot to kernel ok and function test pass

Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com>
Change-Id: I5887a8312f4daab3cbd0a30fea0195670a932e52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-09-08 08:25:19 +00:00
..
amd soc/amd/common/block/gpio_banks: add comment about acpimmio_* symbols 2021-09-08 00:17:23 +00:00
cavium
example src: Introduce ARCH_ALL_STAGES_X86 2021-07-02 08:19:10 +00:00
intel soc/intel/broadwell: Drop unused PCH PCI device macros 2021-09-06 19:08:16 +00:00
mediatek soc/mediatek: preserve WDT reset reason for debugging 2021-09-08 08:25:19 +00:00
nvidia soc/nvidia/tegra124: Increase bootblock size 2021-07-26 05:05:41 +00:00
qualcomm sc7280: Refactor QSPI driver 2021-09-03 18:01:57 +00:00
rockchip include/bcd: move bcd code to commonlib/bsd/include 2021-08-23 14:08:47 +00:00
samsung
sifive
ti
ucb