coreboot-kgpe-d16/src/soc/intel/braswell/acpi
Matt DeVillier 62bef5a6be soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode
Allows eMMC in PCI mode to be seen/used by Windows.

Test: boot Windows installer on google/edgar, observe internal
eMMC storage available for installation when eMMC in PCI (vs ACPI) mode.

Change-Id: I4272c198e5e675f451a1f4de5d46e3cd96371446
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-03-08 17:49:05 +00:00
..
dptf
cpu.asl
device_nvs.asl
globalnvs.asl
gpio.asl
irq_helper.h
irqlinks.asl
irqroute.asl
lpc.asl acpi/tpm: remove non-existent IRQ for Infineon TPM chip 2017-11-30 21:16:12 +00:00
lpe.asl soc/intel/braswell: increase LPEA fw allocation to 2MiB 2018-03-06 22:32:13 +00:00
lpss.asl
platform.asl
scc.asl soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode 2018-03-08 17:49:05 +00:00
sleepstates.asl
southcluster.asl soc/intel/braswell: add LPEA resources to southcluster.asl 2018-03-07 21:19:10 +00:00
xhci.asl