coreboot-kgpe-d16/src/arch/x86/memlayout.ld
Kyösti Mälkki 2289a70b6f arch/x86: Top-align .init in bootblock
Link .init section near the end of bootblock program.
It contains _start16bit, gdtptr and gdt that must be
addressable from realmode, thus within top 64 KiB.

Change-Id: If7b9737650362ac7cd82685cfdfaf18bd2429238
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-01-28 08:54:21 +00:00

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Text

/* SPDX-License-Identifier: GPL-2.0-only */
#include <memlayout.h>
#include <arch/header.ld>
SECTIONS
{
/*
* It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
* like other architectures/chipsets it's not possible because of
* the linking games played during romstage creation by trying
* to find the final landing place in CBFS for XIP. Therefore,
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
RAMSTAGE(CONFIG_RAMBASE, 8M)
#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
#include "car.ld"
#elif ENV_SEPARATE_VERSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
#include "car.ld"
#elif ENV_BOOTBLOCK
#include "car.ld"
#elif ENV_POSTCAR
POSTCAR(32M, 1M)
#endif
}
#if ENV_BOOTBLOCK
#include <arch/x86/bootblock.ld>
#endif /* ENV_BOOTBLOCK */