635b45d608
Add library helpers to access standard arm64 registers. This library also provides functions to directly read/write register based on current el. So, rest of the code doesnt need to keep checking the el and call appropriate function based on that. BUG=chrome-os-partner:31634 BRANCH=None TEST=Libpayload and depthcharge compile successfully for ryu Change-Id: Ibc0ca49f158362d4b7ab2045bf0fbd58ada79360 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2ca6da580cb51b4c23abdaf04fee2785e5780510 Original-Change-Id: I9b63e04aa26a98bbeb34fdef634776d49454ca8d Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/214575 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8784 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
83 lines
2.4 KiB
C
83 lines
2.4 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright 2014 Google Inc.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
|
|
* 3. The name of the author may not be used to endorse or promote products
|
|
* derived from this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
* SUCH DAMAGE.
|
|
*
|
|
* tlb.c: System intructions for TLB maintenance.
|
|
* Reference: ARM Architecture Reference Manual, ARMv8-A edition
|
|
*/
|
|
|
|
#include <stdint.h>
|
|
|
|
#include <arch/lib_helpers.h>
|
|
|
|
/* TLBIALL */
|
|
void tlbiall_el1(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle1\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiall_el2(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle2\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiall_el3(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle3\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiall_current(void)
|
|
{
|
|
SWITCH_CASE_TLBI(tlbiall);
|
|
}
|
|
|
|
/* TLBIALLIS */
|
|
void tlbiallis_el1(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle1is\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiallis_el2(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle2is\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiallis_el3(void)
|
|
{
|
|
__asm__ __volatile__("tlbi alle3is\n\t" : : : "memory");
|
|
}
|
|
|
|
void tlbiallis_current(void)
|
|
{
|
|
SWITCH_CASE_TLBI(tlbiallis);
|
|
}
|
|
|
|
/* TLBIVAA */
|
|
void tlbivaa_el1(uint64_t va)
|
|
{
|
|
__asm__ __volatile__("tlbi vaae1, %0\n\t" : : "r" (va) : "memory");
|
|
}
|