coreboot-kgpe-d16/src
Kyösti Mälkki 639cc9c6ba soc/intel/baytrail,braswell: Sync PCI memory region in ASL
Baytrail had (only) occurence of DwordMemory vs DWordMemory.
Braswell one had bogus comments about the PCI memory range.

The actual region details are dynamically filled in _CRS.

Change-Id: I8d1bf45c6e5520c0b7643602843c665bfb81f9da
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-02 14:50:01 +00:00
..
acpi ACPI: Do minor improvements on GNVS 2021-01-29 10:21:25 +00:00
arch arch/x86/smbios: Add Number Of Power Cords field to be overriden 2021-02-01 08:50:48 +00:00
commonlib
console
cpu treewide [Kconfig]: Remove useless comment 2021-02-02 13:49:49 +00:00
device device/oprom/include/x86emu/fpu_regs.h: Fix lint error 2021-02-01 08:46:11 +00:00
drivers bayhub bh720: Add helpers to access PCR registers 2021-02-01 08:54:45 +00:00
ec ec/google/wilco: Convert to ASL 2.0 syntax 2021-01-24 21:51:39 +00:00
include include/device/pci_ids.h: Add Cannon Lake PCH-H SATA dev ID 2021-02-01 08:52:34 +00:00
lib lib/asan.c: Update SPDX license 2021-02-01 08:53:22 +00:00
mainboard treewide [Kconfig]: Remove useless comment 2021-02-02 13:49:49 +00:00
northbridge treewide [Kconfig]: Remove useless comment 2021-02-02 13:49:49 +00:00
security security/vboot: Add config for GBB_FLAG_ENABLE_UDC 2021-02-01 08:55:22 +00:00
soc soc/intel/baytrail,braswell: Sync PCI memory region in ASL 2021-02-02 14:50:01 +00:00
southbridge treewide [Kconfig]: Remove useless comment 2021-02-02 13:49:49 +00:00
superio superio/nuvoton/common/Kconfig: Remove HWM config 2021-01-29 09:39:43 +00:00
vendorcode vc/google/chromeos/Kconfig: Remove unused NO_TPM_RESUME 2021-01-29 09:40:19 +00:00
Kconfig