649100ad20
The WAK_STS bit is not set in a wake from G3, so the check for this bit needs to only be done when checking for a wake from S3. This change correctly enables the keyboard backlight in wake from G3 and only does not enable it during a wake from S3. BUG=chrome-os-partner:58666 TEST=Use Refresh+Power to issue hard reset and ensure that the keyboard backlight turns on like it does when waking from S5. Also force enter hibernate with Alt+VolumeUp+H and then power back up and ensure that the keyboard backlight is enabled when booting. Change-Id: I44045950e38aa5e5ae96a79385d604791852c7e6 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/18280 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Google Inc.
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* Copyright (C) 2016 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <bootblock_common.h>
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#include <ec/google/chromeec/ec.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <soc/iomap.h>
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#include <soc/pm.h>
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#include "gpio.h"
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static void early_config_gpio(void)
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{
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gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
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}
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void bootblock_mainboard_init(void)
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{
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uint32_t pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
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uint32_t pm1_sts = inl(ACPI_BASE_ADDRESS + PM1_STS);
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/* Turn on keyboard backlight to indicate we are booting */
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if (!((pm1_sts & WAK_STS) && (acpi_sleep_from_pm1(pm1_cnt) == ACPI_S3)))
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google_chromeec_kbbacklight(75);
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early_config_gpio();
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}
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