ed76908e4a
DDR4 reserves 20 bytes for part number without termination. Therefor coreboot buffer for part number has to be increased to 21 bytes, to account termination. BUG=b:77943312 TEST=Build kahlee. Change-Id: I57aa8e06d907a1e6b11ce88f612a0d6c14b7c65b Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25650 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
97 lines
2.2 KiB
C
97 lines
2.2 KiB
C
/*
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* Memory information
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*
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* Copyright (C) 2014, Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MEMORY_INFO_H_
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#define _MEMORY_INFO_H_
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#include <stdint.h>
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#include <compiler.h>
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#define DIMM_INFO_SERIAL_SIZE 4
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#define DIMM_INFO_PART_NUMBER_SIZE 21
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#define DIMM_INFO_TOTAL 8 /* Maximum num of dimm is 8 */
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/**
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* If this table is filled and put in CBMEM,
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* then these info in CBMEM will be used to generate smbios type 17 table
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*
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* Values are specified according to the JEDEC SPD Standard.
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*/
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struct dimm_info {
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/*
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* Size of the module in MiB.
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*/
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uint32_t dimm_size;
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/*
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* SMBIOS (not SPD) device type.
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*
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* See the smbios.h smbios_memory_device_type enum.
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*/
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uint16_t ddr_type;
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uint16_t ddr_frequency;
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uint8_t rank_per_dimm;
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uint8_t channel_num;
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uint8_t dimm_num;
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uint8_t bank_locator;
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/*
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* SPD serial number.
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*/
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uint8_t serial[DIMM_INFO_SERIAL_SIZE];
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/*
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* The last byte is '\0' for the end of string
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*
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* Must contain only printable ASCII.
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*/
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uint8_t module_part_number[DIMM_INFO_PART_NUMBER_SIZE];
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/*
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* SPD Manufacturer ID
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*/
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uint16_t mod_id;
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/*
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* SPD Module Type.
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*
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* See spd.h for valid values.
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*
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* e.g., SPD_RDIMM, SPD_SODIMM, SPD_MICRO_DIMM
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*/
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uint8_t mod_type;
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/*
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* SPD bus width.
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*
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* Bits 0 - 2 encode the primary bus width:
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* 0b000 = 8 bit width
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* 0b001 = 16 bit width
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* 0b010 = 32 bit width
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* 0b011 = 64 bit width
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*
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* Bits 3 - 4 encode the extension bits (ECC):
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* 0b00 = 0 extension bits
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* 0b01 = 8 bit of ECC
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*
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* e.g.,
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* 64 bit bus with 8 bits of ECC (72 bits total): 0b1011
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* 64 bit bus with 0 bits of ECC (64 bits total): 0b0011
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*
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* See the smbios.h smbios_memory_bus_width enum.
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*/
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uint8_t bus_width;
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} __packed;
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struct memory_info {
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uint8_t dimm_cnt;
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struct dimm_info dimm[DIMM_INFO_TOTAL];
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} __packed;
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#endif
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