coreboot-kgpe-d16/targets/pcengines/alix1c/Config.lb
Ronald G. Minnich 6503cd9d00 Final set of changes to make Alix1c work.
Fix IRQ tables (Thanks to Marc Jones)

Fix IRQ SLOT #

Comment out ram test in early startup. 

make the debug print in lx/raminit.c a debug print, not emerg print

Set the default console log level to 3, but leave in the possibility of 
running with more info (leave maximum at 11)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07 23:13:43 +00:00

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target alix1c
mainboard pcengines/alix1c
option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
## ROM_SIZE is the total number of bytes allocated for LinuxBIOS use
## (normal AND fallback images and payloads).
## leave 36k for vsa
##
option ROM_SIZE = 512*1024 - 36 * 1024
## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image,
## not including any payload.
option ROM_IMAGE_SIZE=64*1024
option FALLBACK_SIZE = ROM_SIZE
option DEFAULT_CONSOLE_LOGLEVEL = 3
option MAXIMUM_CONSOLE_LOGLEVEL = 11
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
payload /tmp/filo.elf
end
buildrom ./linuxbios.rom ROM_SIZE "fallback"