794f1e785d
Pick up build 0x26 Picasso FSP binaries. The changes include increased FSPS UPD block size from 0x152 to 0x202. Change-Id: I11fc199ca7bc6ee7431c59d35a60d9ebd977bf10 Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51193 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> |
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| .. | ||
| amd_blobs@3b1a73470c | ||
| arm-trusted-firmware@a4c979ade4 | ||
| blobs@02ab6c6648 | ||
| chromeec@a2390f3c50 | ||
| cmocka@672c5cee79 | ||
| ffs@3ec70fbc45 | ||
| fsp@e7138bf115 | ||
| intel-microcode@49bb67f32a | ||
| intel-sec-tools@a86ff5d400 | ||
| libgfxinit@bc0588e482 | ||
| libhwbase@a3edc6ef32 | ||
| opensbi@215421ca61 | ||
| qc_blobs@6b7fe498eb | ||
| stm@1f3258261a | ||
| vboot@48195e5878 | ||