coreboot-kgpe-d16/src/arch/x86/Kconfig

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menu "Architecture (x86)"
# This is an SMP option. It relates to starting up APs.
# It is usually set in mainboard/*/Kconfig.
# TODO: Improve description.
# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
# can boot AP CPUs to enable their shared caches.
config SIPI_VECTOR_IN_ROM
bool
default n
depends on ARCH_X86
config RAMBASE
hex
default 0x100000
config RAMTOP
hex
default 0x200000
config STACK_SIZE
hex
default 0x8000
# Maximum reboot count
# TODO: Improve description.
config MAX_REBOOT_CNT
int
default 3
# We had to rename the choice options under arch/ because otherwise
# the options would conflict between different architectures despite
# the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
choice
prompt "Bootblock behaviour"
default X86_BOOTBLOCK_SIMPLE
config X86_BOOTBLOCK_SIMPLE
bool "Always load fallback"
config X86_BOOTBLOCK_NORMAL
bool "Switch to normal if CMOS says so"
endchoice
config BOOTBLOCK_SOURCE
string
default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE
default "bootblock_normal.c" if X86_BOOTBLOCK_NORMAL
config UPDATE_IMAGE
bool "Update existing coreboot.rom image"
default n
help
If this option is enabled, no new coreboot.rom file
is created. Instead it is expected that there already
is a suitable file for further processing.
The bootblock will not be modified.
config ROMCC
bool
default n
config PC80_SYSTEM
bool
default y
config BOOTBLOCK_NORTHBRIDGE_INIT
string
config HAVE_CMOS_DEFAULT
def_bool n
config CMOS_DEFAULT_FILE
string
depends on HAVE_CMOS_DEFAULT
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
config HAVE_ARCH_MEMSET
bool
default y
config HAVE_ARCH_MEMCPY
bool
default y
config BIG_ENDIAN
bool
default n
config LITTLE_ENDIAN
bool
default !BIG_ENDIAN
config IOAPIC_INTERRUPTS_ON_FSB
bool
default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
bool
default n
config PCI_CONF2
bool
default n
endmenu