111 lines
1.9 KiB
Plaintext
111 lines
1.9 KiB
Plaintext
menu "Architecture (x86)"
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# This is an SMP option. It relates to starting up APs.
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# It is usually set in mainboard/*/Kconfig.
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# TODO: Improve description.
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# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
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# can boot AP CPUs to enable their shared caches.
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config SIPI_VECTOR_IN_ROM
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bool
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default n
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depends on ARCH_X86
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config RAMBASE
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hex
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default 0x100000
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config RAMTOP
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hex
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default 0x200000
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config STACK_SIZE
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hex
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default 0x8000
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# Maximum reboot count
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# TODO: Improve description.
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config MAX_REBOOT_CNT
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int
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default 3
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# We had to rename the choice options under arch/ because otherwise
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# the options would conflict between different architectures despite
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# the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
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choice
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prompt "Bootblock behaviour"
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default X86_BOOTBLOCK_SIMPLE
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config X86_BOOTBLOCK_SIMPLE
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bool "Always load fallback"
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config X86_BOOTBLOCK_NORMAL
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bool "Switch to normal if CMOS says so"
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endchoice
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config BOOTBLOCK_SOURCE
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string
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default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE
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default "bootblock_normal.c" if X86_BOOTBLOCK_NORMAL
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config UPDATE_IMAGE
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bool "Update existing coreboot.rom image"
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default n
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help
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If this option is enabled, no new coreboot.rom file
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is created. Instead it is expected that there already
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is a suitable file for further processing.
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The bootblock will not be modified.
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config ROMCC
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bool
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default n
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config PC80_SYSTEM
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bool
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default y
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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config HAVE_CMOS_DEFAULT
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def_bool n
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config CMOS_DEFAULT_FILE
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string
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depends on HAVE_CMOS_DEFAULT
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config BOOTBLOCK_SOUTHBRIDGE_INIT
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string
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config HAVE_ARCH_MEMSET
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bool
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default y
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config HAVE_ARCH_MEMCPY
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bool
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default y
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config BIG_ENDIAN
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bool
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default n
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config LITTLE_ENDIAN
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bool
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default !BIG_ENDIAN
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config IOAPIC_INTERRUPTS_ON_FSB
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bool
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default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
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config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
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bool
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default n
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config PCI_CONF2
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bool
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default n
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endmenu
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