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6598bdf2b8
Adapted from Chromium commit: af3ec09 [Lars: Add sdmode-delay device property for maxim98357a] Add "sdmode-delay" as a device property for the maxim98357a codec. This speaker amp requires both SFRM & BCLK to active and stable before it is unmuted. If there is a BCLK and no SFRM, that results in a pop noise. Adding a configurable delay parameter for all Skylake platforms to allow sufficient time for the BCLK & SFRM on I2S to be stable before the amp unmutes itself to avoid a pop noise at the start of playback. Setting the delay to 5ms since the observed delay between SFRM and unmuting of the amp is around 2ms. Adaptation needed to account for parameters having moved from mainboard.asl to devicetree in upstream tree. Original-Change-Id: I1fff4f86ff816e907553e7a6f1d05713f9d85084 Original-Signed-off-by: Rohit Ainapure <rohit.m.ainapure@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I8a1c52ccdb08df9a4ab293e12bb266309e08737b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/23568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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3rdparty | ||
configs | ||
Documentation | ||
payloads | ||
src | ||
util | ||
.checkpatch.conf | ||
.clang-format | ||
.gitignore | ||
.gitmodules | ||
.gitreview | ||
COPYING | ||
gnat.adc | ||
MAINTAINERS | ||
Makefile | ||
Makefile.inc | ||
README | ||
toolchain.inc |
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See https://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * https://www.coreboot.org/Supported_Motherboards * https://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * make * gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case). * iasl (for targets with ACPI support) * pkg-config * libssl-dev (openssl) Optional: * doxygen (for generating/viewing documentation) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig' and 'make nconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult https://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see https://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: https://www.coreboot.org You can contact us directly on the coreboot mailing list: https://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.