coreboot-kgpe-d16/src/soc/amd
Felix Held 65c0655881 soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls
Since Sabrina uses the image slot header (ISH) that depends on the AMD
A/B recovery scheme that depends on the multi-level PSP directory
support, the multi-level support gets automatically selected by passing
Sabrina as SoC name to amdfwtool, so passing the --multilevel command
line switch to amdfwtool isn't needed.

TEST=Timeless build results in identical binary for chausie

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I98154d5b47daca6ae7952ffd3175d98ea3e01845
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-01 14:32:53 +00:00
..
cezanne arch/x86/Kconfig: Drop obsolete fixed ramstage symbols 2022-04-01 13:45:07 +00:00
common soc/amd/common/block/i2c/i23c_pad_ctrl: only configure mode and voltage 2022-04-01 14:32:12 +00:00
picasso arch/x86/Kconfig: Drop obsolete fixed ramstage symbols 2022-04-01 13:45:07 +00:00
sabrina soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls 2022-04-01 14:32:53 +00:00
stoneyridge soc/amd/*/lpc: rename SPIROM_BASE_ADDRESS_REGISTER 2022-03-09 19:01:15 +00:00
Kconfig soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig 2020-11-19 14:29:14 +00:00